[llvm] [SLP] NFC. Remove the useless check for alternate instruction. (PR #117116)
Han-Kuan Chen via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 21 04:34:16 PST 2024
https://github.com/HanKuanChen updated https://github.com/llvm/llvm-project/pull/117116
>From b1d1f9df7aa3c7e0996df5fe8c4a7bdbdb626ef8 Mon Sep 17 00:00:00 2001
From: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: Wed, 20 Nov 2024 22:47:16 -0800
Subject: [PATCH 1/2] [SLP] NFC. Remove the useless check for alternate
instruction.
Only BinaryOperator and CastInst support alternate instruction. It
always returns false for TreeEntry::isAltShuffle if an instruction is
ExtractElementInst, ExtractValueInst, LoadInst, StoreInst or
InsertElementInst.
---
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index dc0dffd9fcbf81..1b900f256489ca 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -1003,7 +1003,7 @@ static InstructionsState getSameOpcode(ArrayRef<Value *> VL,
AltPred == CurrentPred || AltPred == SwappedCurrentPred)
continue;
}
- } else if (InstOpcode == Opcode || InstOpcode == AltOpcode) {
+ } else if (InstOpcode == Opcode) {
if (auto *Gep = dyn_cast<GetElementPtrInst>(I)) {
if (Gep->getNumOperands() != 2 ||
Gep->getOperand(0)->getType() != IBase->getOperand(0)->getType())
@@ -5999,8 +5999,7 @@ void BoUpSLP::reorderTopToBottom() {
if ((TE->State == TreeEntry::Vectorize ||
TE->State == TreeEntry::StridedVectorize) &&
isa<ExtractElementInst, ExtractValueInst, LoadInst, StoreInst,
- InsertElementInst>(TE->getMainOp()) &&
- !TE->isAltShuffle()) {
+ InsertElementInst>(TE->getMainOp())) {
// Build correct orders for extract{element,value}, loads and
// stores.
reorderOrder(TE->ReorderIndices, Mask);
>From 92a7b86c642c5c4ee4d738fccfac5eceb3a6514e Mon Sep 17 00:00:00 2001
From: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: Thu, 21 Nov 2024 04:34:02 -0800
Subject: [PATCH 2/2] apply comment
---
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 1b900f256489ca..d63cea85bd4124 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -975,6 +975,9 @@ static InstructionsState getSameOpcode(ArrayRef<Value *> VL,
Type *Ty1 = Inst->getOperand(0)->getType();
if (Ty0 == Ty1) {
assert(InstOpcode == Opcode && "Expected same CmpInst opcode.");
+ assert(InstOpcode == AltOpcode &&
+ "Alternate instructions are only supported by BinaryOperator "
+ "and CastInst.");
// Check for compatible operands. If the corresponding operands are not
// compatible - need to perform alternate vectorization.
CmpInst::Predicate CurrentPred = Inst->getPredicate();
@@ -1004,6 +1007,9 @@ static InstructionsState getSameOpcode(ArrayRef<Value *> VL,
continue;
}
} else if (InstOpcode == Opcode) {
+ assert(InstOpcode == AltOpcode &&
+ "Alternate instructions are only supported by BinaryOperator and "
+ "CastInst.");
if (auto *Gep = dyn_cast<GetElementPtrInst>(I)) {
if (Gep->getNumOperands() != 2 ||
Gep->getOperand(0)->getType() != IBase->getOperand(0)->getType())
@@ -6000,6 +6006,9 @@ void BoUpSLP::reorderTopToBottom() {
TE->State == TreeEntry::StridedVectorize) &&
isa<ExtractElementInst, ExtractValueInst, LoadInst, StoreInst,
InsertElementInst>(TE->getMainOp())) {
+ assert(!TE->isAltShuffle() &&
+ "Alternate instructions are only supported by BinaryOperator "
+ "and CastInst.");
// Build correct orders for extract{element,value}, loads and
// stores.
reorderOrder(TE->ReorderIndices, Mask);
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