[llvm] AMDGPU: Create InstrMapping from VGPR MFMA to equivalent AGPR instruction (PR #117102)
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Wed Nov 20 18:30:10 PST 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
<details>
<summary>Changes</summary>
This provides infrastructure for a future optimization.
---
Full diff: https://github.com/llvm/llvm-project/pull/117102.diff
3 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/SIInstrInfo.h (+5)
- (modified) llvm/lib/Target/AMDGPU/SIInstrInfo.td (+9)
- (modified) llvm/lib/Target/AMDGPU/VOP3PInstructions.td (+10-5)
``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index 1f7fff76d15210..191754d04aa172 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -1562,6 +1562,11 @@ namespace AMDGPU {
LLVM_READONLY
int getMFMAEarlyClobberOp(uint16_t Opcode);
+ /// \returns Version of an MFMA instruction which uses AGPRs for srcC and
+ /// vdst, given an \p Opcode of an MFMA which uses VGPRs for srcC/vdst.
+ LLVM_READONLY
+ int getMFMASrcCVDstAGPROp(uint16_t Opcode);
+
/// \returns v_cmpx version of a v_cmp instruction.
LLVM_READONLY
int getVCMPXOpFromVCMP(uint16_t Opcode);
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
index d2024cf915874d..90292a6e59387c 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
@@ -3105,6 +3105,15 @@ def getMFMAEarlyClobberOp : InstrMapping {
let ValueCols = [["0"]];
}
+// Map from an mfma using VGPRs to one using AGPRs.
+def getMFMASrcCVDstAGPROp : InstrMapping {
+ let FilterClass = "MFMATable";
+ let RowFields = ["AGPROp"];
+ let ColFields = ["MFMAKind"];
+ let KeyCol = ["VGPR"];
+ let ValueCols = [["AGPR"]];
+}
+
// Maps an v_cmp instruction to its v_cmpx equivalent.
def getVCMPXOpFromVCMP : InstrMapping {
let FilterClass = "VCMPVCMPXTable";
diff --git a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
index 876d4e1acf5964..c1bd5296dfc5fb 100644
--- a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
@@ -639,9 +639,14 @@ def VOPProfileMAI_F32_V8F16_X16_VCD : VOPProfileMAI<VOP_V16F32_V8F16_V8F16_V16F3
def VOPProfileMAI_F32_V8BF16_X16 : VOPProfileMAI<VOP_V16F32_V8BF16_V8BF16_V16F32, AISrc_512_f32, ADst_512, AVSrc_128>;
def VOPProfileMAI_F32_V8BF16_X16_VCD : VOPProfileMAI<VOP_V16F32_V8BF16_V8BF16_V16F32, VISrc_512_f32, VDst_512, AVSrc_128>;
-class MFMATable <bit is_mac, string Name> {
+class MFMATable <bit is_mac, string Kind, string Name,
+ string AGPROpName = NAME> {
bit IsMac = is_mac;
string FMAOp = Name;
+ string AGPROp = AGPROpName;
+
+ // Does this MFMA use "AGPR" or "VGPR" for srcC/vdst
+ string MFMAKind = Kind;
}
class MAIFrag<SDPatternOperator Op, code pred> : PatFrag <
@@ -697,12 +702,12 @@ multiclass MAIInst<string OpName, string P, SDPatternOperator node> {
let Constraints = !if(NoDstOverlap, "@earlyclobber $vdst", "") in {
def _e64 : MAIInst<OpName, !cast<VOPProfileMAI>("VOPProfileMAI_" # P),
!if(!or(NoDstOverlap, !eq(node, null_frag)), null_frag, AgprMAIFrag<node>)>,
- MFMATable<0, NAME # "_e64">;
+ MFMATable<0, "AGPR", NAME # "_e64">;
let OtherPredicates = [isGFX90APlus], Mnemonic = OpName in
def _vgprcd_e64 : MAIInst<OpName # "_vgprcd", !cast<VOPProfileMAI>("VOPProfileMAI_" # P # "_VCD"),
!if(!or(NoDstOverlap, !eq(node, null_frag)), null_frag, VgprMAIFrag<node>)>,
- MFMATable<0, NAME # "_vgprcd_e64">;
+ MFMATable<0, "VGPR", NAME # "_vgprcd_e64", NAME # "_e64">;
}
if NoDstOverlap then {
@@ -711,12 +716,12 @@ multiclass MAIInst<string OpName, string P, SDPatternOperator node> {
Mnemonic = OpName in {
def "_mac_e64" : MAIInst<OpName # "_mac", !cast<VOPProfileMAI>("VOPProfileMAI_" # P),
!if(!eq(node, null_frag), null_frag, AgprMAIFrag<node>)>,
- MFMATable<1, NAME # "_e64">;
+ MFMATable<1, "AGPR", NAME # "_e64", NAME # "_mac_e64">;
let OtherPredicates = [isGFX90APlus] in
def _mac_vgprcd_e64 : MAIInst<OpName # "_mac_vgprcd", !cast<VOPProfileMAI>("VOPProfileMAI_" # P # "_VCD"),
!if(!eq(node, null_frag), null_frag, VgprMAIFrag<node>)>,
- MFMATable<1, NAME # "_vgprcd_e64">;
+ MFMATable<1, "VGPR", NAME # "_vgprcd_e64", NAME # "_mac_e64">;
}
}
} // End isConvergent = 1, mayRaiseFPException = 0, ReadsModeReg = 1
``````````
</details>
https://github.com/llvm/llvm-project/pull/117102
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