[llvm] [RISCV] Add DAG combine to convert (iX ctpop (bitcast (vXi1 A))) into vcpop.m. (PR #117062)

[Craig Topper via llvm-commits]

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@@ -844,12 +850,9 @@ define <128 x i16> @test_expandload_v128i16_all_ones(ptr %base, <128 x i16> %pas
 ; CHECK-RV64-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
 ; CHECK-RV64-NEXT:    vle16.v v8, (a0)
 ; CHECK-RV64-NEXT:    vmset.m v16
-; CHECK-RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
-; CHECK-RV64-NEXT:    vmv.x.s a2, v16
-; CHECK-RV64-NEXT:    cpop a2, a2
-; CHECK-RV64-NEXT:    slli a2, a2, 1
-; CHECK-RV64-NEXT:    add a0, a0, a2
-; CHECK-RV64-NEXT:    vsetvli zero, a1, e16, m8, ta, ma
+; CHECK-RV64-NEXT:    vcpop.m a1, v16
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topperc wrote:

We're missing a DAG combine to turn an expanding load with an all ones mask into a non-expanding unmasked load.

And we don't have a constant fold for (RISCVISD::VCPOP_VL (RISCVISD::VMSET_VL)) -> VL.

https://github.com/llvm/llvm-project/pull/117062