[llvm] [RISCV] Add DAG combine to convert (iX ctpop (bitcast (vXi1 A))) into vcpop.m. (PR #117062)
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 20 14:52:48 PST 2024
================
@@ -17055,6 +17055,52 @@ static SDValue combineTruncToVnclip(SDNode *N, SelectionDAG &DAG,
return Val;
}
+// Convert
+// (iX ctpop (bitcast (vXi1 A)))
+// ->
+// (zext (vcpop.m (nxvYi1 (insert_subvec (vXi1 A)))))
+// FIXME: It's complicated to match all the variations of this after type
+// legalization so we only handle the pre-type legalization pattern, but that
+// requires the fixed vector type to be legal.
+static SDValue combineScalarCTPOPToVCPOP(SDNode *N, SelectionDAG &DAG,
+ const RISCVSubtarget &Subtarget) {
+ EVT VT = N->getValueType(0);
+ if (!VT.isScalarInteger())
+ return SDValue();
+
+ SDValue Src = N->getOperand(0);
+
+ // Peek through zero_extend. It doesn't change the count.
+ if (Src.getOpcode() == ISD::ZERO_EXTEND)
+ Src = Src.getOperand(0);
+
+ if (Src.getOpcode() != ISD::BITCAST)
+ return SDValue();
+
+ Src = Src.getOperand(0);
+ EVT SrcEVT = Src.getValueType();
+ if (!SrcEVT.isSimple())
+ return SDValue();
+
+ MVT SrcMVT = SrcEVT.getSimpleVT();
+ // Make sure the input is an i1 vector.
+ if (!SrcMVT.isVector() || SrcMVT.getVectorElementType() != MVT::i1)
----------------
preames wrote:
What about a 1024 x i1? Something that requires splitting. i.e. do we need an explicit legality check here?
https://github.com/llvm/llvm-project/pull/117062
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