[llvm] [AMDGPU][True16][MC] VOPC profile fake16 pseudo update (PR #113175)

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``````````bash
git-clang-format --diff e468653ee77cd8e0268e5e8d83d5430114f1f4c8 c89978d7397233fb63113c386fded994b6cb44df --extensions cpp -- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index ff0af7f647..e746d33c3d 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -7356,8 +7356,9 @@ void SIInstrInfo::moveToVALUImpl(SIInstrWorklist &Worklist,
     Register CondReg = MRI.createVirtualRegister(RI.getWaveMaskRegClass());
     auto NewInstr =
         BuildMI(*MBB, Inst, Inst.getDebugLoc(), get(NewOpcode), CondReg)
-        .setMIFlags(Inst.getFlags());
-    if (AMDGPU::getNamedOperandIdx(NewOpcode, AMDGPU::OpName::src0_modifiers) >= 0) {
+            .setMIFlags(Inst.getFlags());
+    if (AMDGPU::getNamedOperandIdx(NewOpcode, AMDGPU::OpName::src0_modifiers) >=
+        0) {
       NewInstr
           .addImm(0)               // src0_modifiers
           .add(Inst.getOperand(0)) // src0
@@ -7365,9 +7366,7 @@ void SIInstrInfo::moveToVALUImpl(SIInstrWorklist &Worklist,
           .add(Inst.getOperand(1)) // src1
           .addImm(0);              // clamp
     } else {
-      NewInstr
-          .add(Inst.getOperand(0))
-          .add(Inst.getOperand(1));
+      NewInstr.add(Inst.getOperand(0)).add(Inst.getOperand(1));
     }
     legalizeOperands(*NewInstr, MDT);
     int SCCIdx = Inst.findRegisterDefOperandIdx(AMDGPU::SCC, /*TRI=*/nullptr);

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https://github.com/llvm/llvm-project/pull/113175