[llvm] [AArch64] Don't emit Neon in streaming[-compatible] functions with -fzero-call-used-regs (PR #116995)
David Green via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 20 11:22:27 PST 2024
================
@@ -9694,19 +9694,26 @@ void AArch64InstrInfo::buildClearRegister(Register Reg, MachineBasicBlock &MBB,
MachineBasicBlock::iterator Iter,
DebugLoc &DL,
bool AllowSideEffects) const {
- const MachineFunction &MF = *MBB.getParent();
+ MachineFunction &MF = *MBB.getParent();
const AArch64Subtarget &STI = MF.getSubtarget<AArch64Subtarget>();
const AArch64RegisterInfo &TRI = *STI.getRegisterInfo();
if (TRI.isGeneralPurposeRegister(MF, Reg)) {
BuildMI(MBB, Iter, DL, get(AArch64::MOVZXi), Reg).addImm(0).addImm(0);
- } else if (STI.hasSVE()) {
+ } else if (STI.isSVEorStreamingSVEAvailable()) {
BuildMI(MBB, Iter, DL, get(AArch64::DUP_ZI_D), Reg)
.addImm(0)
.addImm(0);
- } else {
+ } else if (STI.isNeonAvailable()) {
BuildMI(MBB, Iter, DL, get(AArch64::MOVIv2d_ns), Reg)
.addImm(0);
+ } else {
+ // This is a streaming-compatible function without SVE. We don't have full
+ // Neon (just FPRs), so we can at most use the first 64-bit sub-register.
+ // So given `movi v..` would be illegal use `fmov d..` instead.
----------------
davemgreen wrote:
fmovd (and all other instructions that set a `d` register) will implicitly zero the upper bits of the register too, so it should be OK even if other parts of the register do get used.
https://github.com/llvm/llvm-project/pull/116995
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