[llvm] [TailDuplicator] Only duplicate the blocks containing computed gotos (PR #114990)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 20 06:37:22 PST 2024
https://github.com/DianQK updated https://github.com/llvm/llvm-project/pull/114990
>From 344d4a0e828961ebe6b0a04e772c70aa11dd9e5d Mon Sep 17 00:00:00 2001
From: DianQK <dianqk at dianqk.net>
Date: Tue, 5 Nov 2024 21:41:32 +0800
Subject: [PATCH 1/4] Add a computed goto test
---
.../CodeGen/X86/tail-dup-computed-goto.mir | 261 ++++++++++++++++++
1 file changed, 261 insertions(+)
create mode 100644 llvm/test/CodeGen/X86/tail-dup-computed-goto.mir
diff --git a/llvm/test/CodeGen/X86/tail-dup-computed-goto.mir b/llvm/test/CodeGen/X86/tail-dup-computed-goto.mir
new file mode 100644
index 00000000000000..d5214aecb62a1f
--- /dev/null
+++ b/llvm/test/CodeGen/X86/tail-dup-computed-goto.mir
@@ -0,0 +1,261 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=early-tailduplication -tail-dup-size=0 %s -o - | FileCheck %s
+# Check that only the computed goto is duplicated.
+--- |
+ declare i64 @f0()
+ declare i64 @f1()
+ declare i64 @f2()
+ declare i64 @f3()
+ declare i64 @f4()
+ declare i64 @f5()
+ @computed_goto.dispatch = external global [5 x ptr]
+ define void @computed_goto() { ret void }
+ define void @jump_table() { ret void }
+...
+---
+name: computed_goto
+tracksRegLiveness: true
+body: |
+ ; CHECK-LABEL: name: computed_goto
+ ; CHECK: bb.0:
+ ; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f0, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64_nosp = COPY [[COPY]]
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr64_nosp = COPY [[COPY1]]
+ ; CHECK-NEXT: JMP64m $noreg, 8, [[COPY1]], @computed_goto.dispatch, $noreg
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f1, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr64_nosp = COPY [[COPY3]]
+ ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gr64_nosp = COPY [[COPY4]]
+ ; CHECK-NEXT: JMP64m $noreg, 8, [[COPY4]], @computed_goto.dispatch, $noreg
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f2, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY7:%[0-9]+]]:gr64_nosp = COPY [[COPY6]]
+ ; CHECK-NEXT: [[COPY8:%[0-9]+]]:gr64_nosp = COPY [[COPY7]]
+ ; CHECK-NEXT: JMP64m $noreg, 8, [[COPY7]], @computed_goto.dispatch, $noreg
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.3:
+ ; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f3, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: [[COPY9:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY10:%[0-9]+]]:gr64_nosp = COPY [[COPY9]]
+ ; CHECK-NEXT: [[COPY11:%[0-9]+]]:gr64_nosp = COPY [[COPY10]]
+ ; CHECK-NEXT: JMP64m $noreg, 8, [[COPY10]], @computed_goto.dispatch, $noreg
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.4:
+ ; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f4, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: [[COPY12:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY13:%[0-9]+]]:gr64_nosp = COPY [[COPY12]]
+ ; CHECK-NEXT: [[COPY14:%[0-9]+]]:gr64_nosp = COPY [[COPY13]]
+ ; CHECK-NEXT: JMP64m $noreg, 8, [[COPY13]], @computed_goto.dispatch, $noreg
+ bb.0:
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ CALL64pcrel32 target-flags(x86-plt) @f0, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %6:gr64 = COPY $rax
+ %0:gr64 = COPY %6
+ JMP_1 %bb.5
+
+ bb.1:
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ CALL64pcrel32 target-flags(x86-plt) @f1, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %10:gr64 = COPY $rax
+ %1:gr64 = COPY %10
+ JMP_1 %bb.5
+
+ bb.2:
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ CALL64pcrel32 target-flags(x86-plt) @f2, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %9:gr64 = COPY $rax
+ %2:gr64 = COPY %9
+ JMP_1 %bb.5
+
+ bb.3:
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ CALL64pcrel32 target-flags(x86-plt) @f3, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %8:gr64 = COPY $rax
+ %3:gr64 = COPY %8
+ JMP_1 %bb.5
+
+ bb.4:
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ CALL64pcrel32 target-flags(x86-plt) @f4, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %7:gr64 = COPY $rax
+ %4:gr64 = COPY %7
+
+ bb.5:
+ successors: %bb.1, %bb.2, %bb.3, %bb.4
+
+ %5:gr64_nosp = PHI %0, %bb.0, %4, %bb.4, %3, %bb.3, %2, %bb.2, %1, %bb.1
+ JMP64m $noreg, 8, %5, @computed_goto.dispatch, $noreg
+
+...
+---
+name: jump_table
+tracksRegLiveness: true
+jumpTable:
+ kind: block-address
+ entries:
+ - id: 0
+ blocks: [ '%bb.2', '%bb.3', '%bb.4', '%bb.5', '%bb.6' ]
+body: |
+ ; CHECK-LABEL: name: jump_table
+ ; CHECK: bb.0:
+ ; CHECK-NEXT: successors: %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.6(0x1999999a), %bb.7(0x1999999a)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f0, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY [[COPY]]
+ ; CHECK-NEXT: [[DEC64r:%[0-9]+]]:gr64_nosp = DEC64r [[COPY1]], implicit-def dead $eflags
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr64 = COPY [[COPY1]]
+ ; CHECK-NEXT: JMP64m $noreg, 8, [[DEC64r]], %jump-table.0, $noreg :: (load (s64) from jump-table)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.3:
+ ; CHECK-NEXT: successors: %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.6(0x1999999a), %bb.7(0x1999999a)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f1, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr64 = COPY [[COPY3]]
+ ; CHECK-NEXT: [[DEC64r1:%[0-9]+]]:gr64_nosp = DEC64r [[COPY4]], implicit-def dead $eflags
+ ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gr64 = COPY [[COPY4]]
+ ; CHECK-NEXT: JMP64m $noreg, 8, [[DEC64r1]], %jump-table.0, $noreg :: (load (s64) from jump-table)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.4:
+ ; CHECK-NEXT: successors: %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.6(0x1999999a), %bb.7(0x1999999a)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f2, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY7:%[0-9]+]]:gr64 = COPY [[COPY6]]
+ ; CHECK-NEXT: [[DEC64r2:%[0-9]+]]:gr64_nosp = DEC64r [[COPY7]], implicit-def dead $eflags
+ ; CHECK-NEXT: [[COPY8:%[0-9]+]]:gr64 = COPY [[COPY7]]
+ ; CHECK-NEXT: JMP64m $noreg, 8, [[DEC64r2]], %jump-table.0, $noreg :: (load (s64) from jump-table)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.5:
+ ; CHECK-NEXT: successors: %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.6(0x1999999a), %bb.7(0x1999999a)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f3, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: [[COPY9:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY10:%[0-9]+]]:gr64 = COPY [[COPY9]]
+ ; CHECK-NEXT: [[DEC64r3:%[0-9]+]]:gr64_nosp = DEC64r [[COPY10]], implicit-def dead $eflags
+ ; CHECK-NEXT: [[COPY11:%[0-9]+]]:gr64 = COPY [[COPY10]]
+ ; CHECK-NEXT: JMP64m $noreg, 8, [[DEC64r3]], %jump-table.0, $noreg :: (load (s64) from jump-table)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.6:
+ ; CHECK-NEXT: successors: %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.6(0x1999999a), %bb.7(0x1999999a)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f4, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: [[COPY12:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY13:%[0-9]+]]:gr64 = COPY [[COPY12]]
+ ; CHECK-NEXT: [[DEC64r4:%[0-9]+]]:gr64_nosp = DEC64r [[COPY13]], implicit-def dead $eflags
+ ; CHECK-NEXT: [[COPY14:%[0-9]+]]:gr64 = COPY [[COPY13]]
+ ; CHECK-NEXT: JMP64m $noreg, 8, [[DEC64r4]], %jump-table.0, $noreg :: (load (s64) from jump-table)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.7:
+ ; CHECK-NEXT: successors: %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.6(0x1999999a), %bb.7(0x1999999a)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f5, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: [[COPY15:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY16:%[0-9]+]]:gr64 = COPY [[COPY15]]
+ ; CHECK-NEXT: [[DEC64r5:%[0-9]+]]:gr64_nosp = DEC64r [[COPY16]], implicit-def dead $eflags
+ ; CHECK-NEXT: [[COPY17:%[0-9]+]]:gr64 = COPY [[COPY16]]
+ ; CHECK-NEXT: JMP64m $noreg, 8, [[DEC64r5]], %jump-table.0, $noreg :: (load (s64) from jump-table)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.8:
+ bb.0:
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ CALL64pcrel32 target-flags(x86-plt) @f0, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %7:gr64 = COPY $rax
+ %0:gr64 = COPY %7
+
+ bb.1:
+ %1:gr64 = PHI %0, %bb.0, %6, %bb.6, %5, %bb.5, %4, %bb.4, %3, %bb.3, %2, %bb.2
+ %8:gr64_nosp = DEC64r %1, implicit-def dead $eflags
+
+ bb.8:
+ successors: %bb.2(0x1999999a), %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.6(0x1999999a)
+
+ JMP64m $noreg, 8, %8, %jump-table.0, $noreg :: (load (s64) from jump-table)
+
+ bb.2:
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ CALL64pcrel32 target-flags(x86-plt) @f1, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %13:gr64 = COPY $rax
+ %2:gr64 = COPY %13
+ JMP_1 %bb.1
+
+ bb.3:
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ CALL64pcrel32 target-flags(x86-plt) @f2, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %12:gr64 = COPY $rax
+ %3:gr64 = COPY %12
+ JMP_1 %bb.1
+
+ bb.4:
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ CALL64pcrel32 target-flags(x86-plt) @f3, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %11:gr64 = COPY $rax
+ %4:gr64 = COPY %11
+ JMP_1 %bb.1
+
+ bb.5:
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ CALL64pcrel32 target-flags(x86-plt) @f4, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %10:gr64 = COPY $rax
+ %5:gr64 = COPY %10
+ JMP_1 %bb.1
+
+ bb.6:
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ CALL64pcrel32 target-flags(x86-plt) @f5, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %9:gr64 = COPY $rax
+ %6:gr64 = COPY %9
+ JMP_1 %bb.1
+
+ bb.7:
+
+...
>From b24d37a47aa3d226d630ffa9d8fe2e506bad683d Mon Sep 17 00:00:00 2001
From: DianQK <dianqk at dianqk.net>
Date: Tue, 5 Nov 2024 21:15:09 +0800
Subject: [PATCH 2/4] [TailDuplicator] Only duplicate the blocks containing
computed gotos
---
llvm/include/llvm/CodeGen/MachineInstr.h | 8 ++-
llvm/lib/CodeGen/TailDuplicator.cpp | 22 ++++---
.../CodeGen/X86/tail-dup-computed-goto.mir | 64 +++++++++----------
3 files changed, 49 insertions(+), 45 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineInstr.h b/llvm/include/llvm/CodeGen/MachineInstr.h
index ead6bbe1d5f641..6d268628ec14b4 100644
--- a/llvm/include/llvm/CodeGen/MachineInstr.h
+++ b/llvm/include/llvm/CodeGen/MachineInstr.h
@@ -986,8 +986,12 @@ class MachineInstr
/// Return true if this is an indirect branch, such as a
/// branch through a register.
- bool isIndirectBranch(QueryType Type = AnyInBundle) const {
- return hasProperty(MCID::IndirectBranch, Type);
+ bool isIndirectBranch(QueryType Type = AnyInBundle,
+ bool IncludeJumpTable = true) const {
+ return hasProperty(MCID::IndirectBranch, Type) &&
+ (IncludeJumpTable || !llvm::any_of(operands(), [](const auto &Op) {
+ return Op.isJTI();
+ }));
}
/// Return true if this is a branch which may fall
diff --git a/llvm/lib/CodeGen/TailDuplicator.cpp b/llvm/lib/CodeGen/TailDuplicator.cpp
index d0013923838b35..68d9d892370c26 100644
--- a/llvm/lib/CodeGen/TailDuplicator.cpp
+++ b/llvm/lib/CodeGen/TailDuplicator.cpp
@@ -602,17 +602,19 @@ bool TailDuplicator::shouldTailDuplicate(bool IsSimple,
TailBB.canFallThrough())
return false;
- // If the target has hardware branch prediction that can handle indirect
- // branches, duplicating them can often make them predictable when there
- // are common paths through the code. The limit needs to be high enough
- // to allow undoing the effects of tail merging and other optimizations
- // that rearrange the predecessors of the indirect branch.
-
- bool HasIndirectbr = false;
+ // Only duplicate the blocks containing computed gotos. This basically
+ // unfactors computed gotos that were factored early on in the compilation
+ // process to speed up edge based data flow. If we do not unfactor them again,
+ // it can seriously pessimize code with many computed jumps in the source
+ // code, such as interpreters.
+ bool HasComputedGoto = false;
if (!TailBB.empty())
- HasIndirectbr = TailBB.back().isIndirectBranch();
+ HasComputedGoto = TailBB.back().isIndirectBranch(
+ /*Type=*/MachineInstr::AnyInBundle,
+ // Jump tables are not considered computed gotos.
+ /*IncludeJumpTable=*/false);
- if (HasIndirectbr && PreRegAlloc)
+ if (HasComputedGoto && PreRegAlloc)
MaxDuplicateCount = TailDupIndirectBranchSize;
// Check the instructions in the block to determine whether tail-duplication
@@ -684,7 +686,7 @@ bool TailDuplicator::shouldTailDuplicate(bool IsSimple,
}
}
- if (HasIndirectbr && PreRegAlloc)
+ if (HasComputedGoto && PreRegAlloc)
return true;
if (IsSimple)
diff --git a/llvm/test/CodeGen/X86/tail-dup-computed-goto.mir b/llvm/test/CodeGen/X86/tail-dup-computed-goto.mir
index d5214aecb62a1f..b25e17ca82d4dc 100644
--- a/llvm/test/CodeGen/X86/tail-dup-computed-goto.mir
+++ b/llvm/test/CodeGen/X86/tail-dup-computed-goto.mir
@@ -128,76 +128,74 @@ jumpTable:
body: |
; CHECK-LABEL: name: jump_table
; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.6(0x1999999a), %bb.7(0x1999999a)
+ ; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f0, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rax
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY [[COPY]]
- ; CHECK-NEXT: [[DEC64r:%[0-9]+]]:gr64_nosp = DEC64r [[COPY1]], implicit-def dead $eflags
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr64 = COPY [[COPY1]]
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: successors: %bb.2(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[PHI:%[0-9]+]]:gr64 = PHI [[COPY1]], %bb.0, %3, %bb.7, %4, %bb.6, %5, %bb.5, %6, %bb.4, %7, %bb.3
+ ; CHECK-NEXT: [[DEC64r:%[0-9]+]]:gr64_nosp = DEC64r [[PHI]], implicit-def dead $eflags
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: successors: %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.6(0x1999999a), %bb.7(0x1999999a)
+ ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: JMP64m $noreg, 8, [[DEC64r]], %jump-table.0, $noreg :: (load (s64) from jump-table)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
- ; CHECK-NEXT: successors: %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.6(0x1999999a), %bb.7(0x1999999a)
+ ; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f1, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr64 = COPY $rax
- ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr64 = COPY [[COPY3]]
- ; CHECK-NEXT: [[DEC64r1:%[0-9]+]]:gr64_nosp = DEC64r [[COPY4]], implicit-def dead $eflags
- ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gr64 = COPY [[COPY4]]
- ; CHECK-NEXT: JMP64m $noreg, 8, [[DEC64r1]], %jump-table.0, $noreg :: (load (s64) from jump-table)
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr64 = COPY [[COPY2]]
+ ; CHECK-NEXT: JMP_1 %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.4:
- ; CHECK-NEXT: successors: %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.6(0x1999999a), %bb.7(0x1999999a)
+ ; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f2, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gr64 = COPY $rax
- ; CHECK-NEXT: [[COPY7:%[0-9]+]]:gr64 = COPY [[COPY6]]
- ; CHECK-NEXT: [[DEC64r2:%[0-9]+]]:gr64_nosp = DEC64r [[COPY7]], implicit-def dead $eflags
- ; CHECK-NEXT: [[COPY8:%[0-9]+]]:gr64 = COPY [[COPY7]]
- ; CHECK-NEXT: JMP64m $noreg, 8, [[DEC64r2]], %jump-table.0, $noreg :: (load (s64) from jump-table)
+ ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gr64 = COPY [[COPY4]]
+ ; CHECK-NEXT: JMP_1 %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.5:
- ; CHECK-NEXT: successors: %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.6(0x1999999a), %bb.7(0x1999999a)
+ ; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f3, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- ; CHECK-NEXT: [[COPY9:%[0-9]+]]:gr64 = COPY $rax
- ; CHECK-NEXT: [[COPY10:%[0-9]+]]:gr64 = COPY [[COPY9]]
- ; CHECK-NEXT: [[DEC64r3:%[0-9]+]]:gr64_nosp = DEC64r [[COPY10]], implicit-def dead $eflags
- ; CHECK-NEXT: [[COPY11:%[0-9]+]]:gr64 = COPY [[COPY10]]
- ; CHECK-NEXT: JMP64m $noreg, 8, [[DEC64r3]], %jump-table.0, $noreg :: (load (s64) from jump-table)
+ ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY7:%[0-9]+]]:gr64 = COPY [[COPY6]]
+ ; CHECK-NEXT: JMP_1 %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.6:
- ; CHECK-NEXT: successors: %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.6(0x1999999a), %bb.7(0x1999999a)
+ ; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f4, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- ; CHECK-NEXT: [[COPY12:%[0-9]+]]:gr64 = COPY $rax
- ; CHECK-NEXT: [[COPY13:%[0-9]+]]:gr64 = COPY [[COPY12]]
- ; CHECK-NEXT: [[DEC64r4:%[0-9]+]]:gr64_nosp = DEC64r [[COPY13]], implicit-def dead $eflags
- ; CHECK-NEXT: [[COPY14:%[0-9]+]]:gr64 = COPY [[COPY13]]
- ; CHECK-NEXT: JMP64m $noreg, 8, [[DEC64r4]], %jump-table.0, $noreg :: (load (s64) from jump-table)
+ ; CHECK-NEXT: [[COPY8:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY9:%[0-9]+]]:gr64 = COPY [[COPY8]]
+ ; CHECK-NEXT: JMP_1 %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.7:
- ; CHECK-NEXT: successors: %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.6(0x1999999a), %bb.7(0x1999999a)
+ ; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f5, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- ; CHECK-NEXT: [[COPY15:%[0-9]+]]:gr64 = COPY $rax
- ; CHECK-NEXT: [[COPY16:%[0-9]+]]:gr64 = COPY [[COPY15]]
- ; CHECK-NEXT: [[DEC64r5:%[0-9]+]]:gr64_nosp = DEC64r [[COPY16]], implicit-def dead $eflags
- ; CHECK-NEXT: [[COPY17:%[0-9]+]]:gr64 = COPY [[COPY16]]
- ; CHECK-NEXT: JMP64m $noreg, 8, [[DEC64r5]], %jump-table.0, $noreg :: (load (s64) from jump-table)
+ ; CHECK-NEXT: [[COPY10:%[0-9]+]]:gr64 = COPY $rax
+ ; CHECK-NEXT: [[COPY11:%[0-9]+]]:gr64 = COPY [[COPY10]]
+ ; CHECK-NEXT: JMP_1 %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.8:
bb.0:
>From 927b95e3cf1481177eb5ec0d0b8ae4a882d396f5 Mon Sep 17 00:00:00 2001
From: DianQK <dianqk at dianqk.net>
Date: Wed, 20 Nov 2024 22:28:02 +0800
Subject: [PATCH 3/4] Update tail-dup-multiple-latch-loop.ll
---
.../X86/tail-dup-multiple-latch-loop.ll | 78 ++++++-------------
1 file changed, 25 insertions(+), 53 deletions(-)
diff --git a/llvm/test/CodeGen/X86/tail-dup-multiple-latch-loop.ll b/llvm/test/CodeGen/X86/tail-dup-multiple-latch-loop.ll
index 862f60c063804f..bb0e3e7c2ac1d2 100644
--- a/llvm/test/CodeGen/X86/tail-dup-multiple-latch-loop.ll
+++ b/llvm/test/CodeGen/X86/tail-dup-multiple-latch-loop.ll
@@ -6,71 +6,43 @@ define ptr @large_loop_switch(ptr %p) {
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset %rbx, -16
-; CHECK-NEXT: movq %rdi, %rax
+; CHECK-NEXT: movq %rdi, %rsi
; CHECK-NEXT: movl $6, %ebx
-; CHECK-NEXT: movl %ebx, %ecx
-; CHECK-NEXT: jmpq *.LJTI0_0(,%rcx,8)
-; CHECK-NEXT: .LBB0_1: # %for.cond.cleanup
-; CHECK-NEXT: movl $530, %edi # imm = 0x212
-; CHECK-NEXT: movq %rax, %rsi
-; CHECK-NEXT: popq %rbx
-; CHECK-NEXT: .cfi_def_cfa_offset 8
-; CHECK-NEXT: jmp ccc at PLT # TAILCALL
-; CHECK-NEXT: .p2align 4
+; CHECK-NEXT: movl %ebx, %eax
+; CHECK-NEXT: jmpq *.LJTI0_0(,%rax,8)
; CHECK-NEXT: .LBB0_2: # %sw.bb1
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movl $531, %edi # imm = 0x213
-; CHECK-NEXT: movq %rax, %rsi
+; CHECK-NEXT: .LBB0_3: # %for.body
; CHECK-NEXT: callq ccc at PLT
+; CHECK-NEXT: .LBB0_4: # %for.body
+; CHECK-NEXT: movq %rax, %rsi
; CHECK-NEXT: decl %ebx
-; CHECK-NEXT: movl %ebx, %ecx
-; CHECK-NEXT: jmpq *.LJTI0_0(,%rcx,8)
-; CHECK-NEXT: .p2align 4
-; CHECK-NEXT: .LBB0_3: # %sw.bb3
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: movl %ebx, %eax
+; CHECK-NEXT: jmpq *.LJTI0_0(,%rax,8)
+; CHECK-NEXT: .LBB0_5: # %sw.bb3
; CHECK-NEXT: movl $532, %edi # imm = 0x214
-; CHECK-NEXT: movq %rax, %rsi
; CHECK-NEXT: callq bbb at PLT
-; CHECK-NEXT: decl %ebx
-; CHECK-NEXT: movl %ebx, %ecx
-; CHECK-NEXT: jmpq *.LJTI0_0(,%rcx,8)
-; CHECK-NEXT: .p2align 4
-; CHECK-NEXT: .LBB0_4: # %sw.bb5
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movl $533, %edi # imm = 0x215
-; CHECK-NEXT: movq %rax, %rsi
+; CHECK-NEXT: jmp .LBB0_4
+; CHECK-NEXT: .LBB0_10: # %sw.bb11
+; CHECK-NEXT: movl $658, %edi # imm = 0x292
; CHECK-NEXT: callq bbb at PLT
-; CHECK-NEXT: decl %ebx
-; CHECK-NEXT: movl %ebx, %ecx
-; CHECK-NEXT: jmpq *.LJTI0_0(,%rcx,8)
-; CHECK-NEXT: .p2align 4
-; CHECK-NEXT: .LBB0_5: # %sw.bb7
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: jmp .LBB0_4
+; CHECK-NEXT: .LBB0_8: # %sw.bb7
; CHECK-NEXT: movl $535, %edi # imm = 0x217
-; CHECK-NEXT: movq %rax, %rsi
; CHECK-NEXT: callq bbb at PLT
-; CHECK-NEXT: decl %ebx
-; CHECK-NEXT: movl %ebx, %ecx
-; CHECK-NEXT: jmpq *.LJTI0_0(,%rcx,8)
-; CHECK-NEXT: .p2align 4
-; CHECK-NEXT: .LBB0_6: # %sw.bb9
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: jmp .LBB0_4
+; CHECK-NEXT: .LBB0_9: # %sw.bb9
; CHECK-NEXT: movl $536, %edi # imm = 0x218
-; CHECK-NEXT: movq %rax, %rsi
-; CHECK-NEXT: callq ccc at PLT
-; CHECK-NEXT: decl %ebx
-; CHECK-NEXT: movl %ebx, %ecx
-; CHECK-NEXT: jmpq *.LJTI0_0(,%rcx,8)
-; CHECK-NEXT: .p2align 4
-; CHECK-NEXT: .LBB0_7: # %sw.bb11
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movl $658, %edi # imm = 0x292
-; CHECK-NEXT: movq %rax, %rsi
+; CHECK-NEXT: jmp .LBB0_3
+; CHECK-NEXT: .LBB0_7: # %sw.bb5
+; CHECK-NEXT: movl $533, %edi # imm = 0x215
; CHECK-NEXT: callq bbb at PLT
-; CHECK-NEXT: decl %ebx
-; CHECK-NEXT: movl %ebx, %ecx
-; CHECK-NEXT: jmpq *.LJTI0_0(,%rcx,8)
+; CHECK-NEXT: jmp .LBB0_4
+; CHECK-NEXT: .LBB0_11: # %for.cond.cleanup
+; CHECK-NEXT: movl $530, %edi # imm = 0x212
+; CHECK-NEXT: popq %rbx
+; CHECK-NEXT: .cfi_def_cfa_offset 8
+; CHECK-NEXT: jmp ccc at PLT # TAILCALL
entry:
br label %for.body
>From 5e4c0f4cf67fe48492acf340bfde4769ef942ef7 Mon Sep 17 00:00:00 2001
From: DianQK <dianqk at dianqk.net>
Date: Wed, 20 Nov 2024 22:29:30 +0800
Subject: [PATCH 4/4] Revert "[TailDuplicator] Add maximum predecessors and
successors to consider tail duplicating blocks (#78582)"
This reverts commit 86a78284e7ce2ecc7a9283c7d141566a32371492.
Now, we only consider computed GOTOs.
---
llvm/lib/CodeGen/TailDuplicator.cpp | 20 -
.../CodeGen/X86/tail-dup-pred-succ-size.mir | 757 ------------------
2 files changed, 777 deletions(-)
delete mode 100644 llvm/test/CodeGen/X86/tail-dup-pred-succ-size.mir
diff --git a/llvm/lib/CodeGen/TailDuplicator.cpp b/llvm/lib/CodeGen/TailDuplicator.cpp
index 68d9d892370c26..431f9c753d32e6 100644
--- a/llvm/lib/CodeGen/TailDuplicator.cpp
+++ b/llvm/lib/CodeGen/TailDuplicator.cpp
@@ -67,18 +67,6 @@ static cl::opt<unsigned> TailDupIndirectBranchSize(
"end with indirect branches."), cl::init(20),
cl::Hidden);
-static cl::opt<unsigned>
- TailDupPredSize("tail-dup-pred-size",
- cl::desc("Maximum predecessors (maximum successors at the "
- "same time) to consider tail duplicating blocks."),
- cl::init(16), cl::Hidden);
-
-static cl::opt<unsigned>
- TailDupSuccSize("tail-dup-succ-size",
- cl::desc("Maximum successors (maximum predecessors at the "
- "same time) to consider tail duplicating blocks."),
- cl::init(16), cl::Hidden);
-
static cl::opt<bool>
TailDupVerify("tail-dup-verify",
cl::desc("Verify sanity of PHI instructions during taildup"),
@@ -573,14 +561,6 @@ bool TailDuplicator::shouldTailDuplicate(bool IsSimple,
if (TailBB.isSuccessor(&TailBB))
return false;
- // Duplicating a BB which has both multiple predecessors and successors will
- // result in a complex CFG and also may cause huge amount of PHI nodes. If we
- // want to remove this limitation, we have to address
- // https://github.com/llvm/llvm-project/issues/78578.
- if (TailBB.pred_size() > TailDupPredSize &&
- TailBB.succ_size() > TailDupSuccSize)
- return false;
-
// Set the limit on the cost to duplicate. When optimizing for size,
// duplicate only one, because one branch instruction can be eliminated to
// compensate for the duplication.
diff --git a/llvm/test/CodeGen/X86/tail-dup-pred-succ-size.mir b/llvm/test/CodeGen/X86/tail-dup-pred-succ-size.mir
deleted file mode 100644
index 1d17672e2c6bd0..00000000000000
--- a/llvm/test/CodeGen/X86/tail-dup-pred-succ-size.mir
+++ /dev/null
@@ -1,757 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
-# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=early-tailduplication -tail-dup-pred-size=3 -tail-dup-succ-size=3 %s -o - | FileCheck %s -check-prefix=LIMIT
-# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=early-tailduplication -tail-dup-pred-size=4 -tail-dup-succ-size=4 %s -o - | FileCheck %s -check-prefix=NOLIMIT
-
----
-name: foo
-tracksRegLiveness: true
-jumpTable:
- kind: block-address
- entries:
- - id: 0
- blocks: [ '%bb.2', '%bb.3', '%bb.4', '%bb.5' ]
- - id: 1
- blocks: [ '%bb.9', '%bb.10', '%bb.11', '%bb.12' ]
-body: |
- ; LIMIT-LABEL: name: foo
- ; LIMIT: bb.0:
- ; LIMIT-NEXT: successors: %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000), %bb.5(0x20000000)
- ; LIMIT-NEXT: liveins: $rdi, $esi
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $esi
- ; LIMIT-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
- ; LIMIT-NEXT: [[SHR32ri:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 1, implicit-def dead $eflags
- ; LIMIT-NEXT: [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[SHR32ri]], 7, implicit-def dead $eflags
- ; LIMIT-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, killed [[AND32ri]], %subreg.sub_32bit
- ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG]], %jump-table.0, $noreg
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.2:
- ; LIMIT-NEXT: successors: %bb.7(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: JMP_1 %bb.7
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.3:
- ; LIMIT-NEXT: successors: %bb.7(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri1:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm1]], 1, implicit-def dead $eflags
- ; LIMIT-NEXT: JMP_1 %bb.7
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.4:
- ; LIMIT-NEXT: successors: %bb.7(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm2:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri2:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm2]], 2, implicit-def dead $eflags
- ; LIMIT-NEXT: JMP_1 %bb.7
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.5:
- ; LIMIT-NEXT: successors: %bb.7(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm3:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri3:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm3]], 3, implicit-def dead $eflags
- ; LIMIT-NEXT: JMP_1 %bb.7
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.6:
- ; LIMIT-NEXT: successors:
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.7:
- ; LIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[SHR32ri3]], %bb.5, [[SHR32ri2]], %bb.4, [[SHR32ri1]], %bb.3, [[MOV32rm]], %bb.2
- ; LIMIT-NEXT: [[SHR32ri4:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; LIMIT-NEXT: [[AND32ri1:%[0-9]+]]:gr32 = AND32ri [[SHR32ri4]], 7, implicit-def dead $eflags
- ; LIMIT-NEXT: [[SUBREG_TO_REG1:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, killed [[AND32ri1]], %subreg.sub_32bit
- ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG1]], %jump-table.1, $noreg
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.9:
- ; LIMIT-NEXT: successors: %bb.13(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm4:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: JMP_1 %bb.13
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.10:
- ; LIMIT-NEXT: successors: %bb.13(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm5:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri5:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm5]], 1, implicit-def dead $eflags
- ; LIMIT-NEXT: JMP_1 %bb.13
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.11:
- ; LIMIT-NEXT: successors: %bb.13(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm6:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri6:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm6]], 2, implicit-def dead $eflags
- ; LIMIT-NEXT: JMP_1 %bb.13
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.12:
- ; LIMIT-NEXT: successors: %bb.13(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm7:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri7:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm7]], 6, implicit-def dead $eflags
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.13:
- ; LIMIT-NEXT: [[PHI1:%[0-9]+]]:gr32 = PHI [[SHR32ri7]], %bb.12, [[SHR32ri6]], %bb.11, [[SHR32ri5]], %bb.10, [[MOV32rm4]], %bb.9
- ; LIMIT-NEXT: [[OR32rr:%[0-9]+]]:gr32 = OR32rr [[PHI1]], [[PHI]], implicit-def dead $eflags
- ; LIMIT-NEXT: $eax = COPY [[OR32rr]]
- ; LIMIT-NEXT: RET 0, $eax
- ;
- ; NOLIMIT-LABEL: name: foo
- ; NOLIMIT: bb.0:
- ; NOLIMIT-NEXT: successors: %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000), %bb.5(0x20000000)
- ; NOLIMIT-NEXT: liveins: $rdi, $esi
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $esi
- ; NOLIMIT-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
- ; NOLIMIT-NEXT: [[SHR32ri:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 1, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[SHR32ri]], 7, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, killed [[AND32ri]], %subreg.sub_32bit
- ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG]], %jump-table.0, $noreg
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.2:
- ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri1:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[AND32ri1:%[0-9]+]]:gr32 = AND32ri [[SHR32ri1]], 7, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SUBREG_TO_REG1:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri1]], %subreg.sub_32bit
- ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG1]], %jump-table.1, $noreg
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.3:
- ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri2:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm1]], 1, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SHR32ri3:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[AND32ri2:%[0-9]+]]:gr32 = AND32ri [[SHR32ri3]], 7, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SUBREG_TO_REG2:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri2]], %subreg.sub_32bit
- ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG2]], %jump-table.1, $noreg
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.4:
- ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[MOV32rm2:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri4:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm2]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SHR32ri5:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[AND32ri3:%[0-9]+]]:gr32 = AND32ri [[SHR32ri5]], 7, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SUBREG_TO_REG3:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri3]], %subreg.sub_32bit
- ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG3]], %jump-table.1, $noreg
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.5:
- ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[MOV32rm3:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri6:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm3]], 3, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SHR32ri7:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[AND32ri4:%[0-9]+]]:gr32 = AND32ri [[SHR32ri7]], 7, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SUBREG_TO_REG4:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri4]], %subreg.sub_32bit
- ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG4]], %jump-table.1, $noreg
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.6:
- ; NOLIMIT-NEXT: successors:
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.9:
- ; NOLIMIT-NEXT: successors: %bb.13(0x80000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
- ; NOLIMIT-NEXT: [[MOV32rm4:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: JMP_1 %bb.13
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.10:
- ; NOLIMIT-NEXT: successors: %bb.13(0x80000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[PHI1:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
- ; NOLIMIT-NEXT: [[MOV32rm5:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri8:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm5]], 1, implicit-def dead $eflags
- ; NOLIMIT-NEXT: JMP_1 %bb.13
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.11:
- ; NOLIMIT-NEXT: successors: %bb.13(0x80000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[PHI2:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
- ; NOLIMIT-NEXT: [[MOV32rm6:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri9:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm6]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: JMP_1 %bb.13
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.12:
- ; NOLIMIT-NEXT: successors: %bb.13(0x80000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[PHI3:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
- ; NOLIMIT-NEXT: [[MOV32rm7:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri10:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm7]], 6, implicit-def dead $eflags
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.13:
- ; NOLIMIT-NEXT: [[PHI4:%[0-9]+]]:gr32 = PHI [[PHI]], %bb.9, [[PHI1]], %bb.10, [[PHI2]], %bb.11, [[PHI3]], %bb.12
- ; NOLIMIT-NEXT: [[PHI5:%[0-9]+]]:gr32 = PHI [[SHR32ri10]], %bb.12, [[SHR32ri9]], %bb.11, [[SHR32ri8]], %bb.10, [[MOV32rm4]], %bb.9
- ; NOLIMIT-NEXT: [[OR32rr:%[0-9]+]]:gr32 = OR32rr [[PHI5]], [[PHI4]], implicit-def dead $eflags
- ; NOLIMIT-NEXT: $eax = COPY [[OR32rr]]
- ; NOLIMIT-NEXT: RET 0, $eax
- bb.0:
- liveins: $rdi, $esi
-
- %11:gr32 = COPY $esi
- %10:gr64 = COPY $rdi
- %13:gr32 = SHR32ri %11, 1, implicit-def dead $eflags
- %14:gr32 = AND32ri %13, 7, implicit-def dead $eflags
- %12:gr64_nosp = SUBREG_TO_REG 0, killed %14, %subreg.sub_32bit
-
- bb.1:
- successors: %bb.2, %bb.3, %bb.4, %bb.5
-
- JMP64m $noreg, 8, %12, %jump-table.0, $noreg
-
- bb.2:
- %0:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- JMP_1 %bb.7
-
- bb.3:
- %17:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %1:gr32 = SHR32ri %17, 1, implicit-def dead $eflags
- JMP_1 %bb.7
-
- bb.4:
- %16:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %2:gr32 = SHR32ri %16, 2, implicit-def dead $eflags
- JMP_1 %bb.7
-
- bb.5:
- %15:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %3:gr32 = SHR32ri %15, 3, implicit-def dead $eflags
- JMP_1 %bb.7
-
- bb.6:
- successors:
-
- bb.7:
- %4:gr32 = PHI %3, %bb.5, %2, %bb.4, %1, %bb.3, %0, %bb.2
- %19:gr32 = SHR32ri %11, 2, implicit-def dead $eflags
- %20:gr32 = AND32ri %19, 7, implicit-def dead $eflags
- %18:gr64_nosp = SUBREG_TO_REG 0, killed %20, %subreg.sub_32bit
-
- bb.8:
- successors: %bb.9, %bb.10, %bb.11, %bb.12
-
- JMP64m $noreg, 8, %18, %jump-table.1, $noreg
-
- bb.9:
- %5:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- JMP_1 %bb.13
-
- bb.10:
- %23:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %6:gr32 = SHR32ri %23, 1, implicit-def dead $eflags
- JMP_1 %bb.13
-
- bb.11:
- %22:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %7:gr32 = SHR32ri %22, 2, implicit-def dead $eflags
- JMP_1 %bb.13
-
- bb.12:
- %21:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %8:gr32 = SHR32ri %21, 6, implicit-def dead $eflags
-
- bb.13:
- %9:gr32 = PHI %8, %bb.12, %7, %bb.11, %6, %bb.10, %5, %bb.9
- %24:gr32 = OR32rr %9, %4, implicit-def dead $eflags
- $eax = COPY %24
- RET 0, $eax
-
-...
-# Based on foo, but with a phi node in a successor of %bb.7 instead of %bb.7.
----
-name: foo_phi_in_tailbb_successor
-tracksRegLiveness: true
-jumpTable:
- kind: block-address
- entries:
- - id: 0
- blocks: [ '%bb.2', '%bb.3', '%bb.4', '%bb.5', '%bb.9' ]
- - id: 1
- blocks: [ '%bb.9', '%bb.10', '%bb.11', '%bb.12' ]
-body: |
- ; LIMIT-LABEL: name: foo_phi_in_tailbb_successor
- ; LIMIT: bb.0:
- ; LIMIT-NEXT: successors: %bb.2(0x1999999a), %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.9(0x1999999a)
- ; LIMIT-NEXT: liveins: $rdi, $esi
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $esi
- ; LIMIT-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
- ; LIMIT-NEXT: [[SHR32ri:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 1, implicit-def dead $eflags
- ; LIMIT-NEXT: [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[SHR32ri]], 7, implicit-def dead $eflags
- ; LIMIT-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri]], %subreg.sub_32bit
- ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG]], %jump-table.0, $noreg
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.2:
- ; LIMIT-NEXT: successors: %bb.7(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: JMP_1 %bb.7
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.3:
- ; LIMIT-NEXT: successors: %bb.7(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri1:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm1]], 1, implicit-def dead $eflags
- ; LIMIT-NEXT: JMP_1 %bb.7
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.4:
- ; LIMIT-NEXT: successors: %bb.7(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm2:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri2:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm2]], 2, implicit-def dead $eflags
- ; LIMIT-NEXT: JMP_1 %bb.7
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.5:
- ; LIMIT-NEXT: successors: %bb.7(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm3:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri3:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm3]], 3, implicit-def dead $eflags
- ; LIMIT-NEXT: JMP_1 %bb.7
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.6:
- ; LIMIT-NEXT: successors:
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.7:
- ; LIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[SHR32ri4:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; LIMIT-NEXT: [[AND32ri1:%[0-9]+]]:gr32 = AND32ri [[SHR32ri4]], 7, implicit-def dead $eflags
- ; LIMIT-NEXT: [[SUBREG_TO_REG1:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri1]], %subreg.sub_32bit
- ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG1]], %jump-table.1, $noreg
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.9:
- ; LIMIT-NEXT: successors: %bb.13(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[AND32ri]], %bb.0, [[AND32ri1]], %bb.7
- ; LIMIT-NEXT: [[MOV32rm4:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: JMP_1 %bb.13
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.10:
- ; LIMIT-NEXT: successors: %bb.13(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm5:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri5:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm5]], 1, implicit-def dead $eflags
- ; LIMIT-NEXT: JMP_1 %bb.13
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.11:
- ; LIMIT-NEXT: successors: %bb.13(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm6:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri6:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm6]], 2, implicit-def dead $eflags
- ; LIMIT-NEXT: JMP_1 %bb.13
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.12:
- ; LIMIT-NEXT: successors: %bb.13(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm7:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri7:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm7]], 6, implicit-def dead $eflags
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.13:
- ; LIMIT-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[SHR32ri7]], %bb.12, [[SHR32ri6]], %bb.11, [[SHR32ri5]], %bb.10, [[MOV32rm4]], %bb.9
- ; LIMIT-NEXT: [[OR32ri:%[0-9]+]]:gr32 = OR32ri [[PHI]], 1, implicit-def dead $eflags
- ; LIMIT-NEXT: $eax = COPY [[OR32ri]]
- ; LIMIT-NEXT: RET 0, $eax
- ;
- ; NOLIMIT-LABEL: name: foo_phi_in_tailbb_successor
- ; NOLIMIT: bb.0:
- ; NOLIMIT-NEXT: successors: %bb.2(0x1999999a), %bb.3(0x1999999a), %bb.4(0x1999999a), %bb.5(0x1999999a), %bb.9(0x1999999a)
- ; NOLIMIT-NEXT: liveins: $rdi, $esi
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $esi
- ; NOLIMIT-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
- ; NOLIMIT-NEXT: [[SHR32ri:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 1, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[SHR32ri]], 7, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri]], %subreg.sub_32bit
- ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG]], %jump-table.0, $noreg
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.2:
- ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri1:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[AND32ri1:%[0-9]+]]:gr32 = AND32ri [[SHR32ri1]], 7, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SUBREG_TO_REG1:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri1]], %subreg.sub_32bit
- ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG1]], %jump-table.1, $noreg
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.3:
- ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri2:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm1]], 1, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SHR32ri3:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[AND32ri2:%[0-9]+]]:gr32 = AND32ri [[SHR32ri3]], 7, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SUBREG_TO_REG2:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri2]], %subreg.sub_32bit
- ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG2]], %jump-table.1, $noreg
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.4:
- ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[MOV32rm2:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri4:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm2]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SHR32ri5:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[AND32ri3:%[0-9]+]]:gr32 = AND32ri [[SHR32ri5]], 7, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SUBREG_TO_REG3:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri3]], %subreg.sub_32bit
- ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG3]], %jump-table.1, $noreg
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.5:
- ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[MOV32rm3:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri6:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm3]], 3, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SHR32ri7:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[AND32ri4:%[0-9]+]]:gr32 = AND32ri [[SHR32ri7]], 7, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SUBREG_TO_REG4:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri4]], %subreg.sub_32bit
- ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG4]], %jump-table.1, $noreg
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.6:
- ; NOLIMIT-NEXT: successors:
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.9:
- ; NOLIMIT-NEXT: successors: %bb.13(0x80000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[AND32ri]], %bb.0, [[AND32ri1]], %bb.2, [[AND32ri2]], %bb.3, [[AND32ri3]], %bb.4, [[AND32ri4]], %bb.5
- ; NOLIMIT-NEXT: [[MOV32rm4:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: JMP_1 %bb.13
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.10:
- ; NOLIMIT-NEXT: successors: %bb.13(0x80000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[MOV32rm5:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri8:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm5]], 1, implicit-def dead $eflags
- ; NOLIMIT-NEXT: JMP_1 %bb.13
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.11:
- ; NOLIMIT-NEXT: successors: %bb.13(0x80000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[MOV32rm6:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri9:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm6]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: JMP_1 %bb.13
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.12:
- ; NOLIMIT-NEXT: successors: %bb.13(0x80000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[MOV32rm7:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri10:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm7]], 6, implicit-def dead $eflags
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.13:
- ; NOLIMIT-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[SHR32ri10]], %bb.12, [[SHR32ri9]], %bb.11, [[SHR32ri8]], %bb.10, [[MOV32rm4]], %bb.9
- ; NOLIMIT-NEXT: [[OR32ri:%[0-9]+]]:gr32 = OR32ri [[PHI]], 1, implicit-def dead $eflags
- ; NOLIMIT-NEXT: $eax = COPY [[OR32ri]]
- ; NOLIMIT-NEXT: RET 0, $eax
- bb.0:
- liveins: $rdi, $esi
-
- %11:gr32 = COPY $esi
- %10:gr64 = COPY $rdi
- %13:gr32 = SHR32ri %11, 1, implicit-def dead $eflags
- %14:gr32 = AND32ri %13, 7, implicit-def dead $eflags
- %12:gr64_nosp = SUBREG_TO_REG 0, %14, %subreg.sub_32bit
-
- bb.1:
- successors: %bb.2, %bb.3, %bb.4, %bb.5, %bb.9
-
- JMP64m $noreg, 8, %12, %jump-table.0, $noreg
-
- bb.2:
- %0:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- JMP_1 %bb.7
-
- bb.3:
- %17:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %1:gr32 = SHR32ri %17, 1, implicit-def dead $eflags
- JMP_1 %bb.7
-
- bb.4:
- %16:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %2:gr32 = SHR32ri %16, 2, implicit-def dead $eflags
- JMP_1 %bb.7
-
- bb.5:
- %15:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %3:gr32 = SHR32ri %15, 3, implicit-def dead $eflags
- JMP_1 %bb.7
-
- bb.6:
- successors:
-
- bb.7:
- %19:gr32 = SHR32ri %11, 2, implicit-def dead $eflags
- %20:gr32 = AND32ri %19, 7, implicit-def dead $eflags
- %18:gr64_nosp = SUBREG_TO_REG 0, %20, %subreg.sub_32bit
-
- bb.8:
- successors: %bb.9, %bb.10, %bb.11, %bb.12
-
- JMP64m $noreg, 8, %18, %jump-table.1, $noreg
-
- bb.9:
- %9:gr32 = PHI %14, %bb.1, %20, %bb.8
- %5:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- JMP_1 %bb.13
-
- bb.10:
- %23:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %6:gr32 = SHR32ri %23, 1, implicit-def dead $eflags
- JMP_1 %bb.13
-
- bb.11:
- %22:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %7:gr32 = SHR32ri %22, 2, implicit-def dead $eflags
- JMP_1 %bb.13
-
- bb.12:
- %21:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %8:gr32 = SHR32ri %21, 6, implicit-def dead $eflags
-
- bb.13:
- %9:gr32 = PHI %8, %bb.12, %7, %bb.11, %6, %bb.10, %5, %bb.9
- %24:gr32 = OR32ri %9, 1, implicit-def dead $eflags
- $eax = COPY %24
- RET 0, $eax
-
-...
-
-
-# Based on foo, but without any phi nodes.
----
-name: foo_no_phis
-tracksRegLiveness: true
-jumpTable:
- kind: block-address
- entries:
- - id: 0
- blocks: [ '%bb.2', '%bb.3', '%bb.4', '%bb.5' ]
- - id: 1
- blocks: [ '%bb.9', '%bb.10', '%bb.11', '%bb.12' ]
-body: |
- ; LIMIT-LABEL: name: foo_no_phis
- ; LIMIT: bb.0:
- ; LIMIT-NEXT: successors: %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000), %bb.5(0x20000000)
- ; LIMIT-NEXT: liveins: $rdi, $esi
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $esi
- ; LIMIT-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
- ; LIMIT-NEXT: [[SHR32ri:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 1, implicit-def dead $eflags
- ; LIMIT-NEXT: [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[SHR32ri]], 7, implicit-def dead $eflags
- ; LIMIT-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, killed [[AND32ri]], %subreg.sub_32bit
- ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG]], %jump-table.0, $noreg
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.2:
- ; LIMIT-NEXT: successors: %bb.7(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: JMP_1 %bb.7
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.3:
- ; LIMIT-NEXT: successors: %bb.7(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri1:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm1]], 1, implicit-def dead $eflags
- ; LIMIT-NEXT: JMP_1 %bb.7
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.4:
- ; LIMIT-NEXT: successors: %bb.7(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm2:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri2:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm2]], 2, implicit-def dead $eflags
- ; LIMIT-NEXT: JMP_1 %bb.7
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.5:
- ; LIMIT-NEXT: successors: %bb.7(0x80000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[MOV32rm3:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri3:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm3]], 3, implicit-def dead $eflags
- ; LIMIT-NEXT: JMP_1 %bb.7
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.6:
- ; LIMIT-NEXT: successors:
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.7:
- ; LIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[SHR32ri4:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; LIMIT-NEXT: [[AND32ri1:%[0-9]+]]:gr32 = AND32ri [[SHR32ri4]], 7, implicit-def dead $eflags
- ; LIMIT-NEXT: [[SUBREG_TO_REG1:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, killed [[AND32ri1]], %subreg.sub_32bit
- ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG1]], %jump-table.1, $noreg
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.9:
- ; LIMIT-NEXT: [[MOV32rm4:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: MOV32mr [[COPY1]], 1, $noreg, 0, $noreg, [[MOV32rm4]] :: (store (s32))
- ; LIMIT-NEXT: $eax = COPY [[MOV32rm4]]
- ; LIMIT-NEXT: RET 0, $eax
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.10:
- ; LIMIT-NEXT: [[MOV32rm5:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri5:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm5]], 1, implicit-def dead $eflags
- ; LIMIT-NEXT: MOV32mr [[COPY1]], 1, $noreg, 0, $noreg, [[SHR32ri5]] :: (store (s32))
- ; LIMIT-NEXT: $eax = COPY [[SHR32ri5]]
- ; LIMIT-NEXT: RET 0, $eax
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.11:
- ; LIMIT-NEXT: [[MOV32rm6:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri6:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm6]], 2, implicit-def dead $eflags
- ; LIMIT-NEXT: MOV32mr [[COPY1]], 1, $noreg, 0, $noreg, [[SHR32ri6]] :: (store (s32))
- ; LIMIT-NEXT: $eax = COPY [[SHR32ri6]]
- ; LIMIT-NEXT: RET 0, $eax
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.12:
- ; LIMIT-NEXT: [[MOV32rm7:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; LIMIT-NEXT: [[SHR32ri7:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm7]], 6, implicit-def dead $eflags
- ; LIMIT-NEXT: MOV32mr [[COPY1]], 1, $noreg, 0, $noreg, [[SHR32ri7]] :: (store (s32))
- ; LIMIT-NEXT: $eax = COPY [[SHR32ri7]]
- ; LIMIT-NEXT: RET 0, $eax
- ;
- ; NOLIMIT-LABEL: name: foo_no_phis
- ; NOLIMIT: bb.0:
- ; NOLIMIT-NEXT: successors: %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000), %bb.5(0x20000000)
- ; NOLIMIT-NEXT: liveins: $rdi, $esi
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $esi
- ; NOLIMIT-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
- ; NOLIMIT-NEXT: [[SHR32ri:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 1, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[SHR32ri]], 7, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, killed [[AND32ri]], %subreg.sub_32bit
- ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG]], %jump-table.0, $noreg
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.2:
- ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri1:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[AND32ri1:%[0-9]+]]:gr32 = AND32ri [[SHR32ri1]], 7, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SUBREG_TO_REG1:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri1]], %subreg.sub_32bit
- ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG1]], %jump-table.1, $noreg
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.3:
- ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri2:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm1]], 1, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SHR32ri3:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[AND32ri2:%[0-9]+]]:gr32 = AND32ri [[SHR32ri3]], 7, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SUBREG_TO_REG2:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri2]], %subreg.sub_32bit
- ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG2]], %jump-table.1, $noreg
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.4:
- ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[MOV32rm2:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri4:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm2]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SHR32ri5:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[AND32ri3:%[0-9]+]]:gr32 = AND32ri [[SHR32ri5]], 7, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SUBREG_TO_REG3:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri3]], %subreg.sub_32bit
- ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG3]], %jump-table.1, $noreg
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.5:
- ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: [[MOV32rm3:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri6:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm3]], 3, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SHR32ri7:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[AND32ri4:%[0-9]+]]:gr32 = AND32ri [[SHR32ri7]], 7, implicit-def dead $eflags
- ; NOLIMIT-NEXT: [[SUBREG_TO_REG4:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri4]], %subreg.sub_32bit
- ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG4]], %jump-table.1, $noreg
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.6:
- ; NOLIMIT-NEXT: successors:
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.9:
- ; NOLIMIT-NEXT: [[MOV32rm4:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: MOV32mr [[COPY1]], 1, $noreg, 0, $noreg, [[MOV32rm4]] :: (store (s32))
- ; NOLIMIT-NEXT: $eax = COPY [[MOV32rm4]]
- ; NOLIMIT-NEXT: RET 0, $eax
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.10:
- ; NOLIMIT-NEXT: [[MOV32rm5:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri8:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm5]], 1, implicit-def dead $eflags
- ; NOLIMIT-NEXT: MOV32mr [[COPY1]], 1, $noreg, 0, $noreg, [[SHR32ri8]] :: (store (s32))
- ; NOLIMIT-NEXT: $eax = COPY [[SHR32ri8]]
- ; NOLIMIT-NEXT: RET 0, $eax
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.11:
- ; NOLIMIT-NEXT: [[MOV32rm6:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri9:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm6]], 2, implicit-def dead $eflags
- ; NOLIMIT-NEXT: MOV32mr [[COPY1]], 1, $noreg, 0, $noreg, [[SHR32ri9]] :: (store (s32))
- ; NOLIMIT-NEXT: $eax = COPY [[SHR32ri9]]
- ; NOLIMIT-NEXT: RET 0, $eax
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.12:
- ; NOLIMIT-NEXT: [[MOV32rm7:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg
- ; NOLIMIT-NEXT: [[SHR32ri10:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm7]], 6, implicit-def dead $eflags
- ; NOLIMIT-NEXT: MOV32mr [[COPY1]], 1, $noreg, 0, $noreg, [[SHR32ri10]] :: (store (s32))
- ; NOLIMIT-NEXT: $eax = COPY [[SHR32ri10]]
- ; NOLIMIT-NEXT: RET 0, $eax
- bb.0:
- liveins: $rdi, $esi
-
- %11:gr32 = COPY $esi
- %10:gr64 = COPY $rdi
- %13:gr32 = SHR32ri %11, 1, implicit-def dead $eflags
- %14:gr32 = AND32ri %13, 7, implicit-def dead $eflags
- %12:gr64_nosp = SUBREG_TO_REG 0, killed %14, %subreg.sub_32bit
-
- bb.1:
- successors: %bb.2, %bb.3, %bb.4, %bb.5
-
- JMP64m $noreg, 8, %12, %jump-table.0, $noreg
-
- bb.2:
- %0:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- JMP_1 %bb.7
-
- bb.3:
- %17:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %1:gr32 = SHR32ri %17, 1, implicit-def dead $eflags
- JMP_1 %bb.7
-
- bb.4:
- %16:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %2:gr32 = SHR32ri %16, 2, implicit-def dead $eflags
- JMP_1 %bb.7
-
- bb.5:
- %15:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %3:gr32 = SHR32ri %15, 3, implicit-def dead $eflags
- JMP_1 %bb.7
-
- bb.6:
- successors:
-
- bb.7:
- %19:gr32 = SHR32ri %11, 2, implicit-def dead $eflags
- %20:gr32 = AND32ri %19, 7, implicit-def dead $eflags
- %18:gr64_nosp = SUBREG_TO_REG 0, killed %20, %subreg.sub_32bit
-
- bb.8:
- successors: %bb.9, %bb.10, %bb.11, %bb.12
-
- JMP64m $noreg, 8, %18, %jump-table.1, $noreg
-
- bb.9:
- %5:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- MOV32mr %10, 1, $noreg, 0, $noreg, %5 :: (store (s32))
- $eax = COPY %5
- RET 0, $eax
-
- bb.10:
- %23:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %6:gr32 = SHR32ri %23, 1, implicit-def dead $eflags
- MOV32mr %10, 1, $noreg, 0, $noreg, %6 :: (store (s32))
- $eax = COPY %6
- RET 0, $eax
-
- bb.11:
- %22:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %7:gr32 = SHR32ri %22, 2, implicit-def dead $eflags
- MOV32mr %10, 1, $noreg, 0, $noreg, %7 :: (store (s32))
- $eax = COPY %7
- RET 0, $eax
-
- bb.12:
- %21:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg
- %8:gr32 = SHR32ri %21, 6, implicit-def dead $eflags
- MOV32mr %10, 1, $noreg, 0, $noreg, %8 :: (store (s32))
- $eax = COPY %8
- RET 0, $eax
-...
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