[lld] [LLD][ARM] Allow R_ARM_SBREL32 relocations in debug info (PR #116956)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-lld

Author: Oliver Stannard (ostannard)

<details>
<summary>Changes</summary>

The R_ARM_SBREL32 relocation is used in debug info for ARM RWPI (read-write position independent) code. Compiler-generated DWARF info will use an expression to add the relocated value to the actual value of the static base (held in r9) at run-time, so it should be relocated as if the static base is at address 0.

---
Full diff: https://github.com/llvm/llvm-project/pull/116956.diff


2 Files Affected:

- (modified) lld/ELF/InputSection.cpp (+1-1) 
- (added) lld/test/ELF/arm-rwpi-debug-relocs.s (+57) 


``````````diff
diff --git a/lld/ELF/InputSection.cpp b/lld/ELF/InputSection.cpp
index 1221f56dfe68a6..595545e194f815 100644
--- a/lld/ELF/InputSection.cpp
+++ b/lld/ELF/InputSection.cpp
@@ -1092,7 +1092,7 @@ void InputSection::relocateNonAlloc(Ctx &ctx, uint8_t *buf,
     // R_ABS/R_DTPREL and some other relocations can be used from non-SHF_ALLOC
     // sections.
     if (LLVM_LIKELY(expr == R_ABS) || expr == R_DTPREL || expr == R_GOTPLTREL ||
-        expr == R_RISCV_ADD) {
+        expr == R_RISCV_ADD || expr == R_ARM_SBREL) {
       target.relocateNoSym(bufLoc, type,
                            SignExtend64<bits>(sym.getVA(ctx, addend)));
       continue;
diff --git a/lld/test/ELF/arm-rwpi-debug-relocs.s b/lld/test/ELF/arm-rwpi-debug-relocs.s
new file mode 100644
index 00000000000000..47c2e0739377b9
--- /dev/null
+++ b/lld/test/ELF/arm-rwpi-debug-relocs.s
@@ -0,0 +1,57 @@
+// REQUIRES: arm
+// RUN: rm -rf %t && split-file %s %t && cd %t
+
+// RUN: llvm-mc -filetype=obj -triple=armv7a asm.s -o obj.o
+// RUN: ld.lld -T lds.ld obj.o -o exe.elf -e main 2>&1 | FileCheck %s --implicit-check-not=warning: --allow-empty
+// RUN: llvm-objdump -D exe.elf | FileCheck --check-prefix=DISASM %s
+
+// DISASM:      Disassembly of section data1:
+// DISASM:      00001000 <rw>:
+// DISASM-NEXT:     1000: 0000002a
+
+// DISASM:      Disassembly of section data2:
+// DISASM:      00002000 <rw2>:
+// DISASM-NEXT:     2000: 000004d2
+
+// DISASM:      Disassembly of section .debug_something:
+// DISASM:      00000000 <.debug_something>:
+// DISASM-NEXT:        0: 00001000
+// DISASM-NEXT:      ...
+// DISASM-NEXT:      104: 00002000
+
+// Test that R_ARM_SBREL32 relocations in debug info are relocated as if the
+// static base register (r9) is zero. Real DWARF info will use an expression to
+// add this to the real value of the static base at runtime.
+
+//--- lds.ld
+SECTIONS {
+  data1 0x1000 : { *(data1) }
+  data2 0x2000 : { *(data2) }
+}
+
+//--- asm.s
+  .text
+	.type	main,%function
+	.globl	main
+main:
+  bx lr
+  .size main, .-main
+
+	.section data1, "aw", %progbits
+	.type	rw,%object
+	.globl	rw
+rw:
+	.long	42
+	.size	rw, 4
+
+	.section data2, "aw", %progbits
+	.type	rw2,%object
+	.globl	rw2
+rw2:
+	.long	1234
+	.size	rw2, 4
+
+	.section	.debug_something, "", %progbits
+	.long	rw(sbrel)
+  .space 0x100
+	.long	rw2(sbrel)

``````````

</details>


https://github.com/llvm/llvm-project/pull/116956