[llvm] Use `std::move` to avoid copy (PR #113061)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 19 22:13:37 PST 2024
https://github.com/abhishek-kaushik22 updated https://github.com/llvm/llvm-project/pull/113061
>From 9e3c1f709ed410256a5c81c10c581ac35fbdff01 Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Sat, 19 Oct 2024 23:32:07 +0530
Subject: [PATCH 01/15] Use `std::move` to avoid copy
---
llvm/utils/TableGen/Common/CodeGenInstruction.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/utils/TableGen/Common/CodeGenInstruction.cpp b/llvm/utils/TableGen/Common/CodeGenInstruction.cpp
index 1c0ab594d9310a..369fec0cd79dfa 100644
--- a/llvm/utils/TableGen/Common/CodeGenInstruction.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenInstruction.cpp
@@ -180,7 +180,7 @@ CGIOperandList::CGIOperandList(const Record *R) : TheDef(R) {
} else if (!EncoderMethod.empty()) {
// If we have no explicit sub-op dag, but have an top-level encoder
// method, the single encoder will multiple sub-ops, itself.
- OpInfo.EncoderMethodNames[0] = EncoderMethod;
+ OpInfo.EncoderMethodNames[0] = std::move(EncoderMethod);
for (unsigned j = 1; j < NumOps; ++j)
OpInfo.DoNotEncode[j] = true;
}
>From 53d66ac8aa0864e08b10dae414ddfad865335840 Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Sun, 20 Oct 2024 00:44:10 +0530
Subject: [PATCH 02/15] Update CompressInstEmitter.cpp
---
llvm/utils/TableGen/CompressInstEmitter.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/utils/TableGen/CompressInstEmitter.cpp b/llvm/utils/TableGen/CompressInstEmitter.cpp
index e087ff07266380..c95e5f236d28f5 100644
--- a/llvm/utils/TableGen/CompressInstEmitter.cpp
+++ b/llvm/utils/TableGen/CompressInstEmitter.cpp
@@ -523,7 +523,7 @@ getReqFeatures(std::set<std::pair<bool, StringRef>> &FeaturesSet,
}
if (IsOr)
- AnyOfFeatureSets.insert(AnyOfSet);
+ AnyOfFeatureSets.insert(std::move(AnyOfSet));
}
}
>From 634cf6c56138680bdfc241424b25c6985ad9cc38 Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Sun, 20 Oct 2024 00:49:28 +0530
Subject: [PATCH 03/15] Update CodeGenInstAlias.cpp
---
llvm/utils/TableGen/Common/CodeGenInstAlias.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/utils/TableGen/Common/CodeGenInstAlias.cpp b/llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
index 293ed76e0f5026..30694ac2bb2139 100644
--- a/llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
@@ -228,7 +228,7 @@ CodeGenInstAlias::CodeGenInstAlias(const Record *R, const CodeGenTarget &T)
if (NumSubOps == 1 || (InstOpRec->getValue("ParserMatchClass") &&
InstOpRec->getValueAsDef("ParserMatchClass")
->getValueAsString("Name") != "Imm")) {
- ResultOperands.push_back(ResOp);
+ ResultOperands.push_back(std::move(ResOp));
ResultInstOperandIndex.push_back(std::pair(i, -1));
++AliasOpNo;
>From 5543e53c626975cd1b6fde53fe897d6aaa320cd8 Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Sun, 20 Oct 2024 00:51:45 +0530
Subject: [PATCH 04/15] Update CodeGenInstruction.cpp
---
llvm/utils/TableGen/Common/CodeGenInstruction.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/utils/TableGen/Common/CodeGenInstruction.cpp b/llvm/utils/TableGen/Common/CodeGenInstruction.cpp
index 369fec0cd79dfa..c6a2a0bfa3202a 100644
--- a/llvm/utils/TableGen/Common/CodeGenInstruction.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenInstruction.cpp
@@ -137,7 +137,7 @@ CGIOperandList::CGIOperandList(const Record *R) : TheDef(R) {
" has the same name as a previous operand!");
OperandInfo &OpInfo = OperandList.emplace_back(
- Rec, std::string(ArgName), std::string(PrintMethod),
+ Rec, std::string(ArgName), std::string(std::move(PrintMethod)),
OperandNamespace + "::" + OperandType, MIOperandNo, NumOps, MIOpInfo);
if (SubArgDag) {
>From 81e34154ee8f633ad20bc900157a56fd4ce3a4c7 Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Sun, 20 Oct 2024 00:54:41 +0530
Subject: [PATCH 05/15] Update OptionParserEmitter.cpp
---
llvm/utils/TableGen/OptionParserEmitter.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/utils/TableGen/OptionParserEmitter.cpp b/llvm/utils/TableGen/OptionParserEmitter.cpp
index 2872762cc7fd96..7f70d9ed61bc0e 100644
--- a/llvm/utils/TableGen/OptionParserEmitter.cpp
+++ b/llvm/utils/TableGen/OptionParserEmitter.cpp
@@ -483,7 +483,7 @@ static void EmitOptionParser(const RecordKeeper &Records, raw_ostream &OS) {
HelpTextsForVariants.push_back(std::make_pair(
VisibilityNames, VisibilityHelp->getValueAsString("Text")));
}
- EmitHelpTextsForVariants(OS, HelpTextsForVariants);
+ EmitHelpTextsForVariants(OS, std::move(HelpTextsForVariants));
// The option meta-variable name.
OS << ", ";
>From 25d86a7e2a59f4ebe018b28ce9be73ba28bfdaea Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Sun, 20 Oct 2024 00:55:44 +0530
Subject: [PATCH 06/15] Update ARMTargetDefEmitter.cpp
---
llvm/utils/TableGen/ARMTargetDefEmitter.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/utils/TableGen/ARMTargetDefEmitter.cpp b/llvm/utils/TableGen/ARMTargetDefEmitter.cpp
index 6b8ebf96cdf383..752a1568bcfa3b 100644
--- a/llvm/utils/TableGen/ARMTargetDefEmitter.cpp
+++ b/llvm/utils/TableGen/ARMTargetDefEmitter.cpp
@@ -208,7 +208,7 @@ static void EmitARMTargetDef(const RecordKeeper &RK, raw_ostream &OS) {
// Name of the object in C++
const std::string CppSpelling = ArchInfoName(Major, Minor, ProfileUpper);
OS << "inline constexpr ArchInfo " << CppSpelling << " = {\n";
- CppSpellings.push_back(CppSpelling);
+ CppSpellings.push_back(std::move(CppSpelling));
OS << llvm::format(" VersionTuple{%d, %d},\n", Major, Minor);
OS << llvm::format(" %sProfile,\n", ProfileUpper.c_str());
>From 5e1e68ba11c116f7c7d72bd7e3b093077debc52b Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Sun, 20 Oct 2024 00:59:26 +0530
Subject: [PATCH 07/15] Update CompressInstEmitter.cpp
---
llvm/utils/TableGen/CompressInstEmitter.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/utils/TableGen/CompressInstEmitter.cpp b/llvm/utils/TableGen/CompressInstEmitter.cpp
index c95e5f236d28f5..dfdd1100a5fd83 100644
--- a/llvm/utils/TableGen/CompressInstEmitter.cpp
+++ b/llvm/utils/TableGen/CompressInstEmitter.cpp
@@ -115,7 +115,7 @@ class CompressInstEmitter {
CompressPat(const CodeGenInstruction &S, const CodeGenInstruction &D,
std::vector<const Record *> RF, IndexedMap<OpData> &SourceMap,
IndexedMap<OpData> &DestMap, bool IsCompressOnly)
- : Source(S), Dest(D), PatReqFeatures(RF), SourceOperandMap(SourceMap),
+ : Source(S), Dest(D), PatReqFeatures(std::move(RF)), SourceOperandMap(SourceMap),
DestOperandMap(DestMap), IsCompressOnly(IsCompressOnly) {}
};
enum EmitterType { Compress, Uncompress, CheckCompress };
>From 762d84829146b5e258a34a1156b457343e69465d Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Sun, 20 Oct 2024 01:08:10 +0530
Subject: [PATCH 08/15] Update CompressInstEmitter.cpp
---
llvm/utils/TableGen/CompressInstEmitter.cpp | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/llvm/utils/TableGen/CompressInstEmitter.cpp b/llvm/utils/TableGen/CompressInstEmitter.cpp
index dfdd1100a5fd83..1edc5c7361dcf3 100644
--- a/llvm/utils/TableGen/CompressInstEmitter.cpp
+++ b/llvm/utils/TableGen/CompressInstEmitter.cpp
@@ -115,8 +115,9 @@ class CompressInstEmitter {
CompressPat(const CodeGenInstruction &S, const CodeGenInstruction &D,
std::vector<const Record *> RF, IndexedMap<OpData> &SourceMap,
IndexedMap<OpData> &DestMap, bool IsCompressOnly)
- : Source(S), Dest(D), PatReqFeatures(std::move(RF)), SourceOperandMap(SourceMap),
- DestOperandMap(DestMap), IsCompressOnly(IsCompressOnly) {}
+ : Source(S), Dest(D), PatReqFeatures(std::move(RF)),
+ SourceOperandMap(SourceMap), DestOperandMap(DestMap),
+ IsCompressOnly(IsCompressOnly) {}
};
enum EmitterType { Compress, Uncompress, CheckCompress };
const RecordKeeper &Records;
>From 6dceb23911993eabb6e9c60af48fb7b3a3c8d51b Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Sun, 20 Oct 2024 15:43:00 +0530
Subject: [PATCH 09/15] Update FastISelEmitter.cpp
---
llvm/utils/TableGen/FastISelEmitter.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp
index 17198c85f06009..ee8a4a7bc88cb1 100644
--- a/llvm/utils/TableGen/FastISelEmitter.cpp
+++ b/llvm/utils/TableGen/FastISelEmitter.cpp
@@ -567,7 +567,7 @@ void FastISelMap::collectPatterns(const CodeGenDAGPatterns &CGP) {
++DstIndex;
}
- PhysRegInputs.push_back(PhysReg);
+ PhysRegInputs.push_back(std::move(PhysReg));
}
if (Op->getName() != "EXTRACT_SUBREG" && DstIndex < Dst.getNumChildren())
>From 8609235f861489b10a71f440136b4884bc5da813 Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Sun, 20 Oct 2024 15:45:04 +0530
Subject: [PATCH 10/15] Update FastISelEmitter.cpp
---
llvm/utils/TableGen/FastISelEmitter.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp
index ee8a4a7bc88cb1..ead5524c4d4ae2 100644
--- a/llvm/utils/TableGen/FastISelEmitter.cpp
+++ b/llvm/utils/TableGen/FastISelEmitter.cpp
@@ -591,7 +591,7 @@ void FastISelMap::collectPatterns(const CodeGenDAGPatterns &CGP) {
// Ok, we found a pattern that we can handle. Remember it.
InstructionMemo Memo(Pattern.getDstPattern().getOperator()->getName(),
- DstRC, SubRegNo, PhysRegInputs, PredicateCheck);
+ DstRC, SubRegNo, std::move(PhysRegInputs), PredicateCheck);
int complexity = Pattern.getPatternComplexity(CGP);
>From debad0c3bd2abd7f90fa7d1f68257ab5dfd11995 Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Sun, 20 Oct 2024 15:47:54 +0530
Subject: [PATCH 11/15] Update CompressInstEmitter.cpp
---
llvm/utils/TableGen/CompressInstEmitter.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/llvm/utils/TableGen/CompressInstEmitter.cpp b/llvm/utils/TableGen/CompressInstEmitter.cpp
index 1edc5c7361dcf3..d17a6add172ae1 100644
--- a/llvm/utils/TableGen/CompressInstEmitter.cpp
+++ b/llvm/utils/TableGen/CompressInstEmitter.cpp
@@ -486,7 +486,8 @@ void CompressInstEmitter::evaluateCompressPat(const Record *Rec) {
return R->getValueAsBit("AssemblerMatcherPredicate");
});
- CompressPatterns.push_back(CompressPat(SourceInst, DestInst, PatReqFeatures,
+ CompressPatterns.push_back(CompressPat(SourceInst, DestInst,
+ std::move(PatReqFeatures),
SourceOperandMap, DestOperandMap,
Rec->getValueAsBit("isCompressOnly")));
}
>From 499c37fe2943f520a5872b26183f787669701d59 Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Sun, 20 Oct 2024 15:50:42 +0530
Subject: [PATCH 12/15] Update CallingConvEmitter.cpp
---
llvm/utils/TableGen/CallingConvEmitter.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/utils/TableGen/CallingConvEmitter.cpp b/llvm/utils/TableGen/CallingConvEmitter.cpp
index c8f263e15d96b7..108b264497fbe5 100644
--- a/llvm/utils/TableGen/CallingConvEmitter.cpp
+++ b/llvm/utils/TableGen/CallingConvEmitter.cpp
@@ -163,9 +163,9 @@ void CallingConvEmitter::EmitAction(const Record *Action, indent Indent,
O << Indent << "if (MCRegister Reg = State.AllocateReg(" << Name
<< ")) {\n";
if (SwiftAction)
- AssignedSwiftRegsMap[CurrentAction].insert(Name);
+ AssignedSwiftRegsMap[CurrentAction].insert(std::move(Name));
else
- AssignedRegsMap[CurrentAction].insert(Name);
+ AssignedRegsMap[CurrentAction].insert(std::move(Name));
} else {
O << Indent << "static const MCPhysReg RegList" << ++Counter
<< "[] = {\n";
>From 041d906528c96c62b8d8a530e76733cf23bcb39d Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Sun, 20 Oct 2024 15:52:53 +0530
Subject: [PATCH 13/15] Update FastISelEmitter.cpp
---
llvm/utils/TableGen/FastISelEmitter.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp
index ead5524c4d4ae2..c15f5d232092bd 100644
--- a/llvm/utils/TableGen/FastISelEmitter.cpp
+++ b/llvm/utils/TableGen/FastISelEmitter.cpp
@@ -591,7 +591,7 @@ void FastISelMap::collectPatterns(const CodeGenDAGPatterns &CGP) {
// Ok, we found a pattern that we can handle. Remember it.
InstructionMemo Memo(Pattern.getDstPattern().getOperator()->getName(),
- DstRC, SubRegNo, std::move(PhysRegInputs), PredicateCheck);
+ DstRC, std::move(SubRegNo), std::move(PhysRegInputs), PredicateCheck);
int complexity = Pattern.getPatternComplexity(CGP);
>From de6dc48f91759d9fa2fe5ba32008113617a6b7d9 Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Sun, 20 Oct 2024 15:59:14 +0530
Subject: [PATCH 14/15] Update CompressInstEmitter.cpp
---
llvm/utils/TableGen/CompressInstEmitter.cpp | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/llvm/utils/TableGen/CompressInstEmitter.cpp b/llvm/utils/TableGen/CompressInstEmitter.cpp
index d17a6add172ae1..7ebfe50a86d0fb 100644
--- a/llvm/utils/TableGen/CompressInstEmitter.cpp
+++ b/llvm/utils/TableGen/CompressInstEmitter.cpp
@@ -486,10 +486,9 @@ void CompressInstEmitter::evaluateCompressPat(const Record *Rec) {
return R->getValueAsBit("AssemblerMatcherPredicate");
});
- CompressPatterns.push_back(CompressPat(SourceInst, DestInst,
- std::move(PatReqFeatures),
- SourceOperandMap, DestOperandMap,
- Rec->getValueAsBit("isCompressOnly")));
+ CompressPatterns.push_back(CompressPat(
+ SourceInst, DestInst, std::move(PatReqFeatures), SourceOperandMap,
+ DestOperandMap, Rec->getValueAsBit("isCompressOnly")));
}
static void
>From 20117aeb2c9cdc25e867a7ac47104975c8e0d30a Mon Sep 17 00:00:00 2001
From: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: Sun, 20 Oct 2024 16:00:07 +0530
Subject: [PATCH 15/15] Update FastISelEmitter.cpp
---
llvm/utils/TableGen/FastISelEmitter.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp
index c15f5d232092bd..cb876d3d1bed47 100644
--- a/llvm/utils/TableGen/FastISelEmitter.cpp
+++ b/llvm/utils/TableGen/FastISelEmitter.cpp
@@ -591,7 +591,8 @@ void FastISelMap::collectPatterns(const CodeGenDAGPatterns &CGP) {
// Ok, we found a pattern that we can handle. Remember it.
InstructionMemo Memo(Pattern.getDstPattern().getOperator()->getName(),
- DstRC, std::move(SubRegNo), std::move(PhysRegInputs), PredicateCheck);
+ DstRC, std::move(SubRegNo), std::move(PhysRegInputs),
+ PredicateCheck);
int complexity = Pattern.getPatternComplexity(CGP);
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