[llvm] 2187738 - [RISCV] Add additional CHECK prefixes to fixed-vectors-strided-load-store-asm.ll. NFC

Tue Nov 19 16:54:38 PST 2024

Author: Craig Topper
Date: 2024-11-19T16:54:29-08:00
New Revision: 2187738508478372409132ee636393086b46746f

URL: https://github.com/llvm/llvm-project/commit/2187738508478372409132ee636393086b46746f
DIFF: https://github.com/llvm/llvm-project/commit/2187738508478372409132ee636393086b46746f.diff

LOG: [RISCV] Add additional CHECK prefixes to fixed-vectors-strided-load-store-asm.ll. NFC

We had 2 RUN lines with conflicting output sharing prefixes. The
script unfortunately did not report the error.

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
index d506842b5eff67..1a08c613ca36a3 100644

--- a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
@@ -1,8 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+v,+zvl256b | FileCheck %s --check-prefixes=CHECK,V
 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+f,+zve32f,+zvl256b | FileCheck %s --check-prefixes=CHECK,ZVE32F
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+v,+optimized-zero-stride-load,+zvl256b | FileCheck %s --check-prefixes=CHECK,OPTIMIZED
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+f,+zve32f,+optimized-zero-stride-load,+zvl256b | FileCheck %s --check-prefixes=CHECK,OPTIMIZED
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+v,+optimized-zero-stride-load,+zvl256b | FileCheck %s --check-prefixes=CHECK,OPTIMIZED,OPTZVE32F
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+f,+zve32f,+optimized-zero-stride-load,+zvl256b | FileCheck %s --check-prefixes=CHECK,OPTIMIZED,OPTV
 
 %struct.foo = type { i32, i32, i32, i32 }
 
@@ -677,6 +677,54 @@ define void @gather_of_pointers(ptr noalias nocapture %arg, ptr noalias nocaptur
 ; ZVE32F-NEXT:    bne a0, a4, .LBB12_1
 ; ZVE32F-NEXT:  # %bb.2: # %bb18
 ; ZVE32F-NEXT:    ret
+;
+; OPTZVE32F-LABEL: gather_of_pointers:
+; OPTZVE32F:       # %bb.0: # %bb
+; OPTZVE32F-NEXT:    lui a2, 2
+; OPTZVE32F-NEXT:    add a2, a0, a2
+; OPTZVE32F-NEXT:    li a3, 40
+; OPTZVE32F-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
+; OPTZVE32F-NEXT:  .LBB12_1: # %bb2
+; OPTZVE32F-NEXT:    # =>This Inner Loop Header: Depth=1
+; OPTZVE32F-NEXT:    vlse64.v v8, (a1), a3
+; OPTZVE32F-NEXT:    addi a4, a1, 80
+; OPTZVE32F-NEXT:    vlse64.v v9, (a4), a3
+; OPTZVE32F-NEXT:    addi a4, a0, 16
+; OPTZVE32F-NEXT:    vse64.v v8, (a0)
+; OPTZVE32F-NEXT:    addi a0, a0, 32
+; OPTZVE32F-NEXT:    vse64.v v9, (a4)
+; OPTZVE32F-NEXT:    addi a1, a1, 160
+; OPTZVE32F-NEXT:    bne a0, a2, .LBB12_1
+; OPTZVE32F-NEXT:  # %bb.2: # %bb18
+; OPTZVE32F-NEXT:    ret
+;
+; OPTV-LABEL: gather_of_pointers:
+; OPTV:       # %bb.0: # %bb
+; OPTV-NEXT:    li a2, 0
+; OPTV-NEXT:    lui a4, 2
+; OPTV-NEXT:    li a3, 1
+; OPTV-NEXT:    add a4, a0, a4
+; OPTV-NEXT:    li a5, 40
+; OPTV-NEXT:  .LBB12_1: # %bb2
+; OPTV-NEXT:    # =>This Inner Loop Header: Depth=1
+; OPTV-NEXT:    mul a6, a3, a5
+; OPTV-NEXT:    mul a7, a2, a5
+; OPTV-NEXT:    addi a2, a2, 4
+; OPTV-NEXT:    add a6, a1, a6
+; OPTV-NEXT:    add a7, a1, a7
+; OPTV-NEXT:    ld t0, 0(a7)
+; OPTV-NEXT:    ld t1, 0(a6)
+; OPTV-NEXT:    ld a7, 80(a7)
+; OPTV-NEXT:    ld a6, 80(a6)
+; OPTV-NEXT:    sd t0, 0(a0)
+; OPTV-NEXT:    sd t1, 8(a0)
+; OPTV-NEXT:    sd a7, 16(a0)
+; OPTV-NEXT:    sd a6, 24(a0)
+; OPTV-NEXT:    addi a0, a0, 32
+; OPTV-NEXT:    addi a3, a3, 4
+; OPTV-NEXT:    bne a0, a4, .LBB12_1
+; OPTV-NEXT:  # %bb.2: # %bb18
+; OPTV-NEXT:    ret
 bb:
   br label %bb2
 
@@ -754,6 +802,54 @@ define void @scatter_of_pointers(ptr noalias nocapture %arg, ptr noalias nocaptu
 ; ZVE32F-NEXT:    bne a1, a4, .LBB13_1
 ; ZVE32F-NEXT:  # %bb.2: # %bb18
 ; ZVE32F-NEXT:    ret
+;
+; OPTZVE32F-LABEL: scatter_of_pointers:
+; OPTZVE32F:       # %bb.0: # %bb
+; OPTZVE32F-NEXT:    lui a2, 2
+; OPTZVE32F-NEXT:    add a2, a1, a2
+; OPTZVE32F-NEXT:    li a3, 40
+; OPTZVE32F-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
+; OPTZVE32F-NEXT:  .LBB13_1: # %bb2
+; OPTZVE32F-NEXT:    # =>This Inner Loop Header: Depth=1
+; OPTZVE32F-NEXT:    addi a4, a1, 16
+; OPTZVE32F-NEXT:    vle64.v v8, (a1)
+; OPTZVE32F-NEXT:    vle64.v v9, (a4)
+; OPTZVE32F-NEXT:    addi a4, a0, 80
+; OPTZVE32F-NEXT:    addi a1, a1, 32
+; OPTZVE32F-NEXT:    vsse64.v v8, (a0), a3
+; OPTZVE32F-NEXT:    vsse64.v v9, (a4), a3
+; OPTZVE32F-NEXT:    addi a0, a0, 160
+; OPTZVE32F-NEXT:    bne a1, a2, .LBB13_1
+; OPTZVE32F-NEXT:  # %bb.2: # %bb18
+; OPTZVE32F-NEXT:    ret
+;
+; OPTV-LABEL: scatter_of_pointers:
+; OPTV:       # %bb.0: # %bb
+; OPTV-NEXT:    li a2, 0
+; OPTV-NEXT:    lui a4, 2
+; OPTV-NEXT:    li a3, 1
+; OPTV-NEXT:    add a4, a1, a4
+; OPTV-NEXT:    li a5, 40
+; OPTV-NEXT:  .LBB13_1: # %bb2
+; OPTV-NEXT:    # =>This Inner Loop Header: Depth=1
+; OPTV-NEXT:    ld a6, 0(a1)
+; OPTV-NEXT:    ld a7, 8(a1)
+; OPTV-NEXT:    ld t0, 16(a1)
+; OPTV-NEXT:    ld t1, 24(a1)
+; OPTV-NEXT:    mul t2, a3, a5
+; OPTV-NEXT:    mul t3, a2, a5
+; OPTV-NEXT:    addi a2, a2, 4
+; OPTV-NEXT:    addi a1, a1, 32
+; OPTV-NEXT:    add t2, a0, t2
+; OPTV-NEXT:    add t3, a0, t3
+; OPTV-NEXT:    sd a6, 0(t3)
+; OPTV-NEXT:    sd a7, 0(t2)
+; OPTV-NEXT:    sd t0, 80(t3)
+; OPTV-NEXT:    sd t1, 80(t2)
+; OPTV-NEXT:    addi a3, a3, 4
+; OPTV-NEXT:    bne a1, a4, .LBB13_1
+; OPTV-NEXT:  # %bb.2: # %bb18
+; OPTV-NEXT:    ret
 bb:
   br label %bb2
 


        
