[llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)

Artem Belevich via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 19 14:11:45 PST 2024


================
@@ -18754,8 +18754,9 @@ SDValue DAGCombiner::rebuildSetCC(SDValue N) {
       if (LegalTypes)
         SetCCVT = getSetCCResultType(SetCCVT);
       // Replace the uses of XOR with SETCC
-      return DAG.getSetCC(SDLoc(N), SetCCVT, Op0, Op1,
-                          Equal ? ISD::SETEQ : ISD::SETNE);
+      const ISD::CondCode CC = Equal ? ISD::SETEQ : ISD::SETNE;
+      if (!LegalOperations || TLI.isCondCodeLegal(CC, Op0.getSimpleValueType()))
----------------
Artem-B wrote:

OK. That should also be mentioned in the comments.


https://github.com/llvm/llvm-project/pull/115035


More information about the llvm-commits mailing list