[clang] [llvm] [HLSL] Implement WaveActiveAnyTrue intrinsic (PR #115902)

Finn Plummer via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 19 13:26:46 PST 2024


================
@@ -1949,6 +1952,23 @@ bool SPIRVInstructionSelector::selectSign(Register ResVReg,
   return Result;
 }
 
+bool SPIRVInstructionSelector::selectWaveActiveAnyTrue(Register ResVReg,
+                                                       const SPIRVType *ResType,
+                                                       MachineInstr &I) const {
+  assert(I.getNumOperands() == 3);
+  assert(I.getOperand(2).isReg());
+
+  MachineBasicBlock &BB = *I.getParent();
+  SPIRVType *IntTy = GR.getOrCreateSPIRVIntegerType(32, I, TII);
+
+  return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpGroupNonUniformAny))
----------------
inbelic wrote:

If it is easy to write a generic with a different number of operands then we could also look at the other wave intriniscs, eg `wave_is_first_lane` and see if they are also able to be included. They are all `SPIRV::Subgroup` ops.

https://github.com/llvm/llvm-project/pull/115902


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