[llvm] 5b79152 - [AArch64] Make sure there is test coverage for ptr phis. NFC

David Green via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 19 13:01:58 PST 2024


Author: David Green
Date: 2024-11-19T21:01:53Z
New Revision: 5b79152937722a5b80c92146b7c2453401739d5f

URL: https://github.com/llvm/llvm-project/commit/5b79152937722a5b80c92146b7c2453401739d5f
DIFF: https://github.com/llvm/llvm-project/commit/5b79152937722a5b80c92146b7c2453401739d5f.diff

LOG: [AArch64] Make sure there is test coverage for ptr phis. NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/phi.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AArch64/phi.ll b/llvm/test/CodeGen/AArch64/phi.ll
index 402c7eeabb291d..eeafbaffbcc695 100644
--- a/llvm/test/CodeGen/AArch64/phi.ll
+++ b/llvm/test/CodeGen/AArch64/phi.ll
@@ -161,14 +161,45 @@ e:
     ret i128 %h
 }
 
+define ptr @tp0(i1 %c, ptr %p, ptr %a, ptr %b) {
+; CHECK-SD-LABEL: tp0:
+; CHECK-SD:       // %bb.0: // %entry
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB5_2
+; CHECK-SD-NEXT:  // %bb.1: // %t
+; CHECK-SD-NEXT:    mov x3, x2
+; CHECK-SD-NEXT:    str wzr, [x1]
+; CHECK-SD-NEXT:  .LBB5_2: // %e
+; CHECK-SD-NEXT:    mov x0, x3
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: tp0:
+; CHECK-GI:       // %bb.0: // %entry
+; CHECK-GI-NEXT:    mov w8, w0
+; CHECK-GI-NEXT:    mov x0, x3
+; CHECK-GI-NEXT:    tbz w8, #0, .LBB5_2
+; CHECK-GI-NEXT:  // %bb.1: // %t
+; CHECK-GI-NEXT:    mov x0, x2
+; CHECK-GI-NEXT:    str wzr, [x1]
+; CHECK-GI-NEXT:  .LBB5_2: // %e
+; CHECK-GI-NEXT:    ret
+entry:
+    br i1 %c, label %t, label %e
+t:
+    store i32 0, ptr %p
+    br label %e
+e:
+    %h = phi ptr [%a, %t], [%b, %entry]
+    ret ptr %h
+}
+
 define half @tf16(i1 %c, ptr %p, half %a, half %b) {
 ; CHECK-LABEL: tf16:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB5_2
+; CHECK-NEXT:    tbz w0, #0, .LBB6_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    fmov s1, s0
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB5_2: // %e
+; CHECK-NEXT:  .LBB6_2: // %e
 ; CHECK-NEXT:    fmov s0, s1
 ; CHECK-NEXT:    ret
 entry:
@@ -184,11 +215,11 @@ e:
 define float @tf32(i1 %c, ptr %p, float %a, float %b) {
 ; CHECK-LABEL: tf32:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB6_2
+; CHECK-NEXT:    tbz w0, #0, .LBB7_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    fmov s1, s0
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB6_2: // %e
+; CHECK-NEXT:  .LBB7_2: // %e
 ; CHECK-NEXT:    fmov s0, s1
 ; CHECK-NEXT:    ret
 entry:
@@ -204,11 +235,11 @@ e:
 define double @tf64(i1 %c, ptr %p, double %a, double %b) {
 ; CHECK-LABEL: tf64:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB7_2
+; CHECK-NEXT:    tbz w0, #0, .LBB8_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    fmov d1, d0
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB7_2: // %e
+; CHECK-NEXT:  .LBB8_2: // %e
 ; CHECK-NEXT:    fmov d0, d1
 ; CHECK-NEXT:    ret
 entry:
@@ -224,25 +255,25 @@ e:
 define fp128 @tf128(i1 %c, ptr %p, fp128 %a, fp128 %b) {
 ; CHECK-SD-LABEL: tf128:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB8_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB9_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    mov v1.16b, v0.16b
 ; CHECK-SD-NEXT:    str wzr, [x1]
-; CHECK-SD-NEXT:  .LBB8_2: // %e
+; CHECK-SD-NEXT:  .LBB9_2: // %e
 ; CHECK-SD-NEXT:    mov v0.16b, v1.16b
 ; CHECK-SD-NEXT:    ret
 ;
 ; CHECK-GI-LABEL: tf128:
 ; CHECK-GI:       // %bb.0: // %entry
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB8_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB9_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    mov d2, v0.d[1]
 ; CHECK-GI-NEXT:    fmov d1, d0
 ; CHECK-GI-NEXT:    str wzr, [x1]
-; CHECK-GI-NEXT:    b .LBB8_3
-; CHECK-GI-NEXT:  .LBB8_2:
+; CHECK-GI-NEXT:    b .LBB9_3
+; CHECK-GI-NEXT:  .LBB9_2:
 ; CHECK-GI-NEXT:    mov d2, v1.d[1]
-; CHECK-GI-NEXT:  .LBB8_3: // %e
+; CHECK-GI-NEXT:  .LBB9_3: // %e
 ; CHECK-GI-NEXT:    fmov x8, d1
 ; CHECK-GI-NEXT:    mov v0.d[0], x8
 ; CHECK-GI-NEXT:    fmov x8, d2
@@ -261,11 +292,11 @@ e:
 define <2 x i8> @tv2i8(i1 %c, ptr %p, <2 x i8> %a, <2 x i8> %b) {
 ; CHECK-SD-LABEL: tv2i8:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB9_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB10_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    fmov d1, d0
 ; CHECK-SD-NEXT:    str wzr, [x1]
-; CHECK-SD-NEXT:  .LBB9_2: // %e
+; CHECK-SD-NEXT:  .LBB10_2: // %e
 ; CHECK-SD-NEXT:    fmov d0, d1
 ; CHECK-SD-NEXT:    ret
 ;
@@ -273,17 +304,17 @@ define <2 x i8> @tv2i8(i1 %c, ptr %p, <2 x i8> %a, <2 x i8> %b) {
 ; CHECK-GI:       // %bb.0: // %entry
 ; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
 ; CHECK-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB9_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB10_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    mov w8, v0.s[1]
 ; CHECK-GI-NEXT:    str wzr, [x1]
 ; CHECK-GI-NEXT:    mov v0.b[1], w8
 ; CHECK-GI-NEXT:    fmov d1, d0
-; CHECK-GI-NEXT:    b .LBB9_3
-; CHECK-GI-NEXT:  .LBB9_2:
+; CHECK-GI-NEXT:    b .LBB10_3
+; CHECK-GI-NEXT:  .LBB10_2:
 ; CHECK-GI-NEXT:    mov w8, v1.s[1]
 ; CHECK-GI-NEXT:    mov v1.b[1], w8
-; CHECK-GI-NEXT:  .LBB9_3: // %e
+; CHECK-GI-NEXT:  .LBB10_3: // %e
 ; CHECK-GI-NEXT:    umov w8, v1.b[0]
 ; CHECK-GI-NEXT:    umov w9, v1.b[1]
 ; CHECK-GI-NEXT:    mov v0.s[0], w8
@@ -303,13 +334,13 @@ e:
 define <3 x i8> @tv3i8(i1 %c, ptr %p, <3 x i8> %a, <3 x i8> %b) {
 ; CHECK-SD-LABEL: tv3i8:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB10_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB11_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    mov w5, w2
 ; CHECK-SD-NEXT:    mov w6, w3
 ; CHECK-SD-NEXT:    mov w7, w4
 ; CHECK-SD-NEXT:    str wzr, [x1]
-; CHECK-SD-NEXT:  .LBB10_2: // %e
+; CHECK-SD-NEXT:  .LBB11_2: // %e
 ; CHECK-SD-NEXT:    mov w0, w5
 ; CHECK-SD-NEXT:    mov w1, w6
 ; CHECK-SD-NEXT:    mov w2, w7
@@ -317,18 +348,18 @@ define <3 x i8> @tv3i8(i1 %c, ptr %p, <3 x i8> %a, <3 x i8> %b) {
 ;
 ; CHECK-GI-LABEL: tv3i8:
 ; CHECK-GI:       // %bb.0: // %entry
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB10_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB11_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    fmov s0, w2
 ; CHECK-GI-NEXT:    str wzr, [x1]
 ; CHECK-GI-NEXT:    mov v0.b[1], w3
 ; CHECK-GI-NEXT:    mov v0.b[2], w4
-; CHECK-GI-NEXT:    b .LBB10_3
-; CHECK-GI-NEXT:  .LBB10_2:
+; CHECK-GI-NEXT:    b .LBB11_3
+; CHECK-GI-NEXT:  .LBB11_2:
 ; CHECK-GI-NEXT:    fmov s0, w5
 ; CHECK-GI-NEXT:    mov v0.b[1], w6
 ; CHECK-GI-NEXT:    mov v0.b[2], w7
-; CHECK-GI-NEXT:  .LBB10_3: // %e
+; CHECK-GI-NEXT:  .LBB11_3: // %e
 ; CHECK-GI-NEXT:    umov w0, v0.b[0]
 ; CHECK-GI-NEXT:    umov w1, v0.b[1]
 ; CHECK-GI-NEXT:    umov w2, v0.b[2]
@@ -346,24 +377,24 @@ e:
 define <4 x i8> @tv4i8(i1 %c, ptr %p, <4 x i8> %a, <4 x i8> %b) {
 ; CHECK-SD-LABEL: tv4i8:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB11_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB12_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    fmov d1, d0
 ; CHECK-SD-NEXT:    str wzr, [x1]
-; CHECK-SD-NEXT:  .LBB11_2: // %e
+; CHECK-SD-NEXT:  .LBB12_2: // %e
 ; CHECK-SD-NEXT:    fmov d0, d1
 ; CHECK-SD-NEXT:    ret
 ;
 ; CHECK-GI-LABEL: tv4i8:
 ; CHECK-GI:       // %bb.0: // %entry
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB11_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB12_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    uzp1 v0.8b, v0.8b, v0.8b
 ; CHECK-GI-NEXT:    str wzr, [x1]
 ; CHECK-GI-NEXT:    ushll v0.8h, v0.8b, #0
 ; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-GI-NEXT:    ret
-; CHECK-GI-NEXT:  .LBB11_2:
+; CHECK-GI-NEXT:  .LBB12_2:
 ; CHECK-GI-NEXT:    uzp1 v0.8b, v1.8b, v0.8b
 ; CHECK-GI-NEXT:    ushll v0.8h, v0.8b, #0
 ; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
@@ -381,11 +412,11 @@ e:
 define <8 x i8> @tv8i8(i1 %c, ptr %p, <8 x i8> %a, <8 x i8> %b) {
 ; CHECK-LABEL: tv8i8:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB12_2
+; CHECK-NEXT:    tbz w0, #0, .LBB13_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    fmov d1, d0
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB12_2: // %e
+; CHECK-NEXT:  .LBB13_2: // %e
 ; CHECK-NEXT:    fmov d0, d1
 ; CHECK-NEXT:    ret
 entry:
@@ -401,11 +432,11 @@ e:
 define <16 x i8> @tv16i8(i1 %c, ptr %p, <16 x i8> %a, <16 x i8> %b) {
 ; CHECK-LABEL: tv16i8:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB13_2
+; CHECK-NEXT:    tbz w0, #0, .LBB14_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    mov v1.16b, v0.16b
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB13_2: // %e
+; CHECK-NEXT:  .LBB14_2: // %e
 ; CHECK-NEXT:    mov v0.16b, v1.16b
 ; CHECK-NEXT:    ret
 entry:
@@ -421,12 +452,12 @@ e:
 define <32 x i8> @tv32i8(i1 %c, ptr %p, <32 x i8> %a, <32 x i8> %b) {
 ; CHECK-SD-LABEL: tv32i8:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB14_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB15_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    mov v2.16b, v0.16b
 ; CHECK-SD-NEXT:    mov v3.16b, v1.16b
 ; CHECK-SD-NEXT:    str wzr, [x1]
-; CHECK-SD-NEXT:  .LBB14_2: // %e
+; CHECK-SD-NEXT:  .LBB15_2: // %e
 ; CHECK-SD-NEXT:    mov v0.16b, v2.16b
 ; CHECK-SD-NEXT:    mov v1.16b, v3.16b
 ; CHECK-SD-NEXT:    ret
@@ -435,12 +466,12 @@ define <32 x i8> @tv32i8(i1 %c, ptr %p, <32 x i8> %a, <32 x i8> %b) {
 ; CHECK-GI:       // %bb.0: // %entry
 ; CHECK-GI-NEXT:    mov v4.16b, v0.16b
 ; CHECK-GI-NEXT:    mov v0.16b, v2.16b
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB14_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB15_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    mov v0.16b, v4.16b
 ; CHECK-GI-NEXT:    mov v3.16b, v1.16b
 ; CHECK-GI-NEXT:    str wzr, [x1]
-; CHECK-GI-NEXT:  .LBB14_2: // %e
+; CHECK-GI-NEXT:  .LBB15_2: // %e
 ; CHECK-GI-NEXT:    mov v1.16b, v3.16b
 ; CHECK-GI-NEXT:    ret
 entry:
@@ -456,24 +487,24 @@ e:
 define <2 x i16> @tv2i16(i1 %c, ptr %p, <2 x i16> %a, <2 x i16> %b) {
 ; CHECK-SD-LABEL: tv2i16:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB15_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB16_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    fmov d1, d0
 ; CHECK-SD-NEXT:    str wzr, [x1]
-; CHECK-SD-NEXT:  .LBB15_2: // %e
+; CHECK-SD-NEXT:  .LBB16_2: // %e
 ; CHECK-SD-NEXT:    fmov d0, d1
 ; CHECK-SD-NEXT:    ret
 ;
 ; CHECK-GI-LABEL: tv2i16:
 ; CHECK-GI:       // %bb.0: // %entry
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB15_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB16_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    uzp1 v0.4h, v0.4h, v0.4h
 ; CHECK-GI-NEXT:    str wzr, [x1]
 ; CHECK-GI-NEXT:    ushll v0.4s, v0.4h, #0
 ; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-GI-NEXT:    ret
-; CHECK-GI-NEXT:  .LBB15_2:
+; CHECK-GI-NEXT:  .LBB16_2:
 ; CHECK-GI-NEXT:    uzp1 v0.4h, v1.4h, v0.4h
 ; CHECK-GI-NEXT:    ushll v0.4s, v0.4h, #0
 ; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
@@ -491,11 +522,11 @@ e:
 define <3 x i16> @tv3i16(i1 %c, ptr %p, <3 x i16> %a, <3 x i16> %b) {
 ; CHECK-LABEL: tv3i16:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB16_2
+; CHECK-NEXT:    tbz w0, #0, .LBB17_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    fmov d1, d0
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB16_2: // %e
+; CHECK-NEXT:  .LBB17_2: // %e
 ; CHECK-NEXT:    fmov d0, d1
 ; CHECK-NEXT:    ret
 entry:
@@ -511,11 +542,11 @@ e:
 define <4 x i16> @tv4i16(i1 %c, ptr %p, <4 x i16> %a, <4 x i16> %b) {
 ; CHECK-LABEL: tv4i16:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB17_2
+; CHECK-NEXT:    tbz w0, #0, .LBB18_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    fmov d1, d0
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB17_2: // %e
+; CHECK-NEXT:  .LBB18_2: // %e
 ; CHECK-NEXT:    fmov d0, d1
 ; CHECK-NEXT:    ret
 entry:
@@ -531,11 +562,11 @@ e:
 define <8 x i16> @tv8i16(i1 %c, ptr %p, <8 x i16> %a, <8 x i16> %b) {
 ; CHECK-LABEL: tv8i16:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB18_2
+; CHECK-NEXT:    tbz w0, #0, .LBB19_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    mov v1.16b, v0.16b
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB18_2: // %e
+; CHECK-NEXT:  .LBB19_2: // %e
 ; CHECK-NEXT:    mov v0.16b, v1.16b
 ; CHECK-NEXT:    ret
 entry:
@@ -551,12 +582,12 @@ e:
 define <16 x i16> @tv16i16(i1 %c, ptr %p, <16 x i16> %a, <16 x i16> %b) {
 ; CHECK-SD-LABEL: tv16i16:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB19_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB20_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    mov v2.16b, v0.16b
 ; CHECK-SD-NEXT:    mov v3.16b, v1.16b
 ; CHECK-SD-NEXT:    str wzr, [x1]
-; CHECK-SD-NEXT:  .LBB19_2: // %e
+; CHECK-SD-NEXT:  .LBB20_2: // %e
 ; CHECK-SD-NEXT:    mov v0.16b, v2.16b
 ; CHECK-SD-NEXT:    mov v1.16b, v3.16b
 ; CHECK-SD-NEXT:    ret
@@ -565,12 +596,12 @@ define <16 x i16> @tv16i16(i1 %c, ptr %p, <16 x i16> %a, <16 x i16> %b) {
 ; CHECK-GI:       // %bb.0: // %entry
 ; CHECK-GI-NEXT:    mov v4.16b, v0.16b
 ; CHECK-GI-NEXT:    mov v0.16b, v2.16b
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB19_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB20_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    mov v0.16b, v4.16b
 ; CHECK-GI-NEXT:    mov v3.16b, v1.16b
 ; CHECK-GI-NEXT:    str wzr, [x1]
-; CHECK-GI-NEXT:  .LBB19_2: // %e
+; CHECK-GI-NEXT:  .LBB20_2: // %e
 ; CHECK-GI-NEXT:    mov v1.16b, v3.16b
 ; CHECK-GI-NEXT:    ret
 entry:
@@ -586,11 +617,11 @@ e:
 define <2 x i32> @tv2i32(i1 %c, ptr %p, <2 x i32> %a, <2 x i32> %b) {
 ; CHECK-LABEL: tv2i32:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB20_2
+; CHECK-NEXT:    tbz w0, #0, .LBB21_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    fmov d1, d0
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB20_2: // %e
+; CHECK-NEXT:  .LBB21_2: // %e
 ; CHECK-NEXT:    fmov d0, d1
 ; CHECK-NEXT:    ret
 entry:
@@ -606,11 +637,11 @@ e:
 define <3 x i32> @tv3i32(i1 %c, ptr %p, <3 x i32> %a, <3 x i32> %b) {
 ; CHECK-LABEL: tv3i32:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB21_2
+; CHECK-NEXT:    tbz w0, #0, .LBB22_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    mov v1.16b, v0.16b
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB21_2: // %e
+; CHECK-NEXT:  .LBB22_2: // %e
 ; CHECK-NEXT:    mov v0.16b, v1.16b
 ; CHECK-NEXT:    ret
 entry:
@@ -626,11 +657,11 @@ e:
 define <4 x i32> @tv4i32(i1 %c, ptr %p, <4 x i32> %a, <4 x i32> %b) {
 ; CHECK-LABEL: tv4i32:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB22_2
+; CHECK-NEXT:    tbz w0, #0, .LBB23_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    mov v1.16b, v0.16b
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB22_2: // %e
+; CHECK-NEXT:  .LBB23_2: // %e
 ; CHECK-NEXT:    mov v0.16b, v1.16b
 ; CHECK-NEXT:    ret
 entry:
@@ -646,12 +677,12 @@ e:
 define <8 x i32> @tv8i32(i1 %c, ptr %p, <8 x i32> %a, <8 x i32> %b) {
 ; CHECK-SD-LABEL: tv8i32:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB23_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB24_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    mov v2.16b, v0.16b
 ; CHECK-SD-NEXT:    mov v3.16b, v1.16b
 ; CHECK-SD-NEXT:    str wzr, [x1]
-; CHECK-SD-NEXT:  .LBB23_2: // %e
+; CHECK-SD-NEXT:  .LBB24_2: // %e
 ; CHECK-SD-NEXT:    mov v0.16b, v2.16b
 ; CHECK-SD-NEXT:    mov v1.16b, v3.16b
 ; CHECK-SD-NEXT:    ret
@@ -660,12 +691,12 @@ define <8 x i32> @tv8i32(i1 %c, ptr %p, <8 x i32> %a, <8 x i32> %b) {
 ; CHECK-GI:       // %bb.0: // %entry
 ; CHECK-GI-NEXT:    mov v4.16b, v0.16b
 ; CHECK-GI-NEXT:    mov v0.16b, v2.16b
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB23_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB24_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    mov v0.16b, v4.16b
 ; CHECK-GI-NEXT:    mov v3.16b, v1.16b
 ; CHECK-GI-NEXT:    str wzr, [x1]
-; CHECK-GI-NEXT:  .LBB23_2: // %e
+; CHECK-GI-NEXT:  .LBB24_2: // %e
 ; CHECK-GI-NEXT:    mov v1.16b, v3.16b
 ; CHECK-GI-NEXT:    ret
 entry:
@@ -681,11 +712,11 @@ e:
 define <2 x i64> @tv2i64(i1 %c, ptr %p, <2 x i64> %a, <2 x i64> %b) {
 ; CHECK-LABEL: tv2i64:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB24_2
+; CHECK-NEXT:    tbz w0, #0, .LBB25_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    mov v1.16b, v0.16b
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB24_2: // %e
+; CHECK-NEXT:  .LBB25_2: // %e
 ; CHECK-NEXT:    mov v0.16b, v1.16b
 ; CHECK-NEXT:    ret
 entry:
@@ -701,13 +732,13 @@ e:
 define <3 x i64> @tv3i64(i1 %c, ptr %p, <3 x i64> %a, <3 x i64> %b) {
 ; CHECK-SD-LABEL: tv3i64:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB25_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB26_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    fmov d3, d0
 ; CHECK-SD-NEXT:    fmov d4, d1
 ; CHECK-SD-NEXT:    str wzr, [x1]
 ; CHECK-SD-NEXT:    fmov d5, d2
-; CHECK-SD-NEXT:  .LBB25_2: // %e
+; CHECK-SD-NEXT:  .LBB26_2: // %e
 ; CHECK-SD-NEXT:    fmov d0, d3
 ; CHECK-SD-NEXT:    fmov d1, d4
 ; CHECK-SD-NEXT:    fmov d2, d5
@@ -717,7 +748,7 @@ define <3 x i64> @tv3i64(i1 %c, ptr %p, <3 x i64> %a, <3 x i64> %b) {
 ; CHECK-GI:       // %bb.0: // %entry
 ; CHECK-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
 ; CHECK-GI-NEXT:    // kill: def $d4 killed $d4 def $q4
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB25_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB26_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    fmov d6, d0
 ; CHECK-GI-NEXT:    fmov d7, d2
@@ -729,7 +760,7 @@ define <3 x i64> @tv3i64(i1 %c, ptr %p, <3 x i64> %a, <3 x i64> %b) {
 ; CHECK-GI-NEXT:    mov v0.16b, v6.16b
 ; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-GI-NEXT:    ret
-; CHECK-GI-NEXT:  .LBB25_2:
+; CHECK-GI-NEXT:  .LBB26_2:
 ; CHECK-GI-NEXT:    fmov d0, d3
 ; CHECK-GI-NEXT:    fmov d2, d5
 ; CHECK-GI-NEXT:    // kill: def $d2 killed $d2 killed $q2
@@ -750,12 +781,12 @@ e:
 define <4 x i64> @tv4i64(i1 %c, ptr %p, <4 x i64> %a, <4 x i64> %b) {
 ; CHECK-SD-LABEL: tv4i64:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB26_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB27_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    mov v2.16b, v0.16b
 ; CHECK-SD-NEXT:    mov v3.16b, v1.16b
 ; CHECK-SD-NEXT:    str wzr, [x1]
-; CHECK-SD-NEXT:  .LBB26_2: // %e
+; CHECK-SD-NEXT:  .LBB27_2: // %e
 ; CHECK-SD-NEXT:    mov v0.16b, v2.16b
 ; CHECK-SD-NEXT:    mov v1.16b, v3.16b
 ; CHECK-SD-NEXT:    ret
@@ -764,12 +795,12 @@ define <4 x i64> @tv4i64(i1 %c, ptr %p, <4 x i64> %a, <4 x i64> %b) {
 ; CHECK-GI:       // %bb.0: // %entry
 ; CHECK-GI-NEXT:    mov v4.16b, v0.16b
 ; CHECK-GI-NEXT:    mov v0.16b, v2.16b
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB26_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB27_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    mov v0.16b, v4.16b
 ; CHECK-GI-NEXT:    mov v3.16b, v1.16b
 ; CHECK-GI-NEXT:    str wzr, [x1]
-; CHECK-GI-NEXT:  .LBB26_2: // %e
+; CHECK-GI-NEXT:  .LBB27_2: // %e
 ; CHECK-GI-NEXT:    mov v1.16b, v3.16b
 ; CHECK-GI-NEXT:    ret
 entry:
@@ -785,15 +816,15 @@ e:
 define <2 x i128> @tv2i128(i1 %c, ptr %p, <2 x i128> %a, <2 x i128> %b) {
 ; CHECK-SD-LABEL: tv2i128:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB27_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB28_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    mov x6, x2
 ; CHECK-SD-NEXT:    mov x7, x3
 ; CHECK-SD-NEXT:    str wzr, [x1]
-; CHECK-SD-NEXT:    b .LBB27_3
-; CHECK-SD-NEXT:  .LBB27_2:
+; CHECK-SD-NEXT:    b .LBB28_3
+; CHECK-SD-NEXT:  .LBB28_2:
 ; CHECK-SD-NEXT:    ldp x4, x5, [sp]
-; CHECK-SD-NEXT:  .LBB27_3: // %e
+; CHECK-SD-NEXT:  .LBB28_3: // %e
 ; CHECK-SD-NEXT:    mov x0, x6
 ; CHECK-SD-NEXT:    mov x1, x7
 ; CHECK-SD-NEXT:    mov x2, x4
@@ -802,7 +833,7 @@ define <2 x i128> @tv2i128(i1 %c, ptr %p, <2 x i128> %a, <2 x i128> %b) {
 ;
 ; CHECK-GI-LABEL: tv2i128:
 ; CHECK-GI:       // %bb.0: // %entry
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB27_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB28_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    mov x9, x2
 ; CHECK-GI-NEXT:    mov x10, x3
@@ -812,7 +843,7 @@ define <2 x i128> @tv2i128(i1 %c, ptr %p, <2 x i128> %a, <2 x i128> %b) {
 ; CHECK-GI-NEXT:    mov x0, x9
 ; CHECK-GI-NEXT:    mov x1, x10
 ; CHECK-GI-NEXT:    ret
-; CHECK-GI-NEXT:  .LBB27_2:
+; CHECK-GI-NEXT:  .LBB28_2:
 ; CHECK-GI-NEXT:    ldp x2, x3, [sp]
 ; CHECK-GI-NEXT:    mov x0, x6
 ; CHECK-GI-NEXT:    mov x1, x7
@@ -827,14 +858,117 @@ e:
     ret <2 x i128> %h
 }
 
+define <2 x ptr> @tv2p0(i1 %c, ptr %p, <2 x ptr> %a, <2 x ptr> %b) {
+; CHECK-LABEL: tv2p0:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    tbz w0, #0, .LBB29_2
+; CHECK-NEXT:  // %bb.1: // %t
+; CHECK-NEXT:    mov v1.16b, v0.16b
+; CHECK-NEXT:    str wzr, [x1]
+; CHECK-NEXT:  .LBB29_2: // %e
+; CHECK-NEXT:    mov v0.16b, v1.16b
+; CHECK-NEXT:    ret
+entry:
+    br i1 %c, label %t, label %e
+t:
+    store i32 0, ptr %p
+    br label %e
+e:
+    %h = phi <2 x ptr> [%a, %t], [%b, %entry]
+    ret <2 x ptr> %h
+}
+
+define <3 x ptr> @tv3p0(i1 %c, ptr %p, <3 x ptr> %a, <3 x ptr> %b) {
+; CHECK-SD-LABEL: tv3p0:
+; CHECK-SD:       // %bb.0: // %entry
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB30_2
+; CHECK-SD-NEXT:  // %bb.1: // %t
+; CHECK-SD-NEXT:    fmov d3, d0
+; CHECK-SD-NEXT:    fmov d4, d1
+; CHECK-SD-NEXT:    str wzr, [x1]
+; CHECK-SD-NEXT:    fmov d5, d2
+; CHECK-SD-NEXT:  .LBB30_2: // %e
+; CHECK-SD-NEXT:    fmov d0, d3
+; CHECK-SD-NEXT:    fmov d1, d4
+; CHECK-SD-NEXT:    fmov d2, d5
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: tv3p0:
+; CHECK-GI:       // %bb.0: // %entry
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB30_2
+; CHECK-GI-NEXT:  // %bb.1: // %t
+; CHECK-GI-NEXT:    fmov x8, d0
+; CHECK-GI-NEXT:    fmov x9, d2
+; CHECK-GI-NEXT:    str wzr, [x1]
+; CHECK-GI-NEXT:    mov v0.d[0], x8
+; CHECK-GI-NEXT:    fmov x8, d1
+; CHECK-GI-NEXT:    b .LBB30_3
+; CHECK-GI-NEXT:  .LBB30_2:
+; CHECK-GI-NEXT:    fmov x8, d3
+; CHECK-GI-NEXT:    fmov x9, d5
+; CHECK-GI-NEXT:    mov v0.d[0], x8
+; CHECK-GI-NEXT:    fmov x8, d4
+; CHECK-GI-NEXT:  .LBB30_3: // %e
+; CHECK-GI-NEXT:    mov v1.d[0], x9
+; CHECK-GI-NEXT:    mov v0.d[1], x8
+; CHECK-GI-NEXT:    mov d2, v0.d[1]
+; CHECK-GI-NEXT:    fmov x10, d1
+; CHECK-GI-NEXT:    fmov d1, d2
+; CHECK-GI-NEXT:    fmov d2, x10
+; CHECK-GI-NEXT:    ret
+entry:
+    br i1 %c, label %t, label %e
+t:
+    store i32 0, ptr %p
+    br label %e
+e:
+    %h = phi <3 x ptr> [%a, %t], [%b, %entry]
+    ret <3 x ptr> %h
+}
+
+define <4 x ptr> @tv4p0(i1 %c, ptr %p, <4 x ptr> %a, <4 x ptr> %b) {
+; CHECK-SD-LABEL: tv4p0:
+; CHECK-SD:       // %bb.0: // %entry
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB31_2
+; CHECK-SD-NEXT:  // %bb.1: // %t
+; CHECK-SD-NEXT:    mov v2.16b, v0.16b
+; CHECK-SD-NEXT:    mov v3.16b, v1.16b
+; CHECK-SD-NEXT:    str wzr, [x1]
+; CHECK-SD-NEXT:  .LBB31_2: // %e
+; CHECK-SD-NEXT:    mov v0.16b, v2.16b
+; CHECK-SD-NEXT:    mov v1.16b, v3.16b
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: tv4p0:
+; CHECK-GI:       // %bb.0: // %entry
+; CHECK-GI-NEXT:    mov v4.16b, v0.16b
+; CHECK-GI-NEXT:    mov v0.16b, v2.16b
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB31_2
+; CHECK-GI-NEXT:  // %bb.1: // %t
+; CHECK-GI-NEXT:    mov v0.16b, v4.16b
+; CHECK-GI-NEXT:    mov v3.16b, v1.16b
+; CHECK-GI-NEXT:    str wzr, [x1]
+; CHECK-GI-NEXT:  .LBB31_2: // %e
+; CHECK-GI-NEXT:    mov v1.16b, v3.16b
+; CHECK-GI-NEXT:    ret
+entry:
+    br i1 %c, label %t, label %e
+t:
+    store i32 0, ptr %p
+    br label %e
+e:
+    %h = phi <4 x ptr> [%a, %t], [%b, %entry]
+    ret <4 x ptr> %h
+}
+
 define <2 x half> @tv2f16(i1 %c, ptr %p, <2 x half> %a, <2 x half> %b) {
 ; CHECK-LABEL: tv2f16:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB28_2
+; CHECK-NEXT:    tbz w0, #0, .LBB32_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    fmov d1, d0
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB28_2: // %e
+; CHECK-NEXT:  .LBB32_2: // %e
 ; CHECK-NEXT:    fmov d0, d1
 ; CHECK-NEXT:    ret
 entry:
@@ -850,11 +984,11 @@ e:
 define <3 x half> @tv3f16(i1 %c, ptr %p, <3 x half> %a, <3 x half> %b) {
 ; CHECK-LABEL: tv3f16:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB29_2
+; CHECK-NEXT:    tbz w0, #0, .LBB33_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    fmov d1, d0
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB29_2: // %e
+; CHECK-NEXT:  .LBB33_2: // %e
 ; CHECK-NEXT:    fmov d0, d1
 ; CHECK-NEXT:    ret
 entry:
@@ -870,11 +1004,11 @@ e:
 define <4 x half> @tv4f16(i1 %c, ptr %p, <4 x half> %a, <4 x half> %b) {
 ; CHECK-LABEL: tv4f16:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB30_2
+; CHECK-NEXT:    tbz w0, #0, .LBB34_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    fmov d1, d0
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB30_2: // %e
+; CHECK-NEXT:  .LBB34_2: // %e
 ; CHECK-NEXT:    fmov d0, d1
 ; CHECK-NEXT:    ret
 entry:
@@ -890,11 +1024,11 @@ e:
 define <8 x half> @tv8f16(i1 %c, ptr %p, <8 x half> %a, <8 x half> %b) {
 ; CHECK-LABEL: tv8f16:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB31_2
+; CHECK-NEXT:    tbz w0, #0, .LBB35_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    mov v1.16b, v0.16b
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB31_2: // %e
+; CHECK-NEXT:  .LBB35_2: // %e
 ; CHECK-NEXT:    mov v0.16b, v1.16b
 ; CHECK-NEXT:    ret
 entry:
@@ -910,12 +1044,12 @@ e:
 define <16 x half> @tv16f16(i1 %c, ptr %p, <16 x half> %a, <16 x half> %b) {
 ; CHECK-SD-LABEL: tv16f16:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB32_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB36_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    mov v2.16b, v0.16b
 ; CHECK-SD-NEXT:    mov v3.16b, v1.16b
 ; CHECK-SD-NEXT:    str wzr, [x1]
-; CHECK-SD-NEXT:  .LBB32_2: // %e
+; CHECK-SD-NEXT:  .LBB36_2: // %e
 ; CHECK-SD-NEXT:    mov v0.16b, v2.16b
 ; CHECK-SD-NEXT:    mov v1.16b, v3.16b
 ; CHECK-SD-NEXT:    ret
@@ -924,12 +1058,12 @@ define <16 x half> @tv16f16(i1 %c, ptr %p, <16 x half> %a, <16 x half> %b) {
 ; CHECK-GI:       // %bb.0: // %entry
 ; CHECK-GI-NEXT:    mov v4.16b, v0.16b
 ; CHECK-GI-NEXT:    mov v0.16b, v2.16b
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB32_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB36_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    mov v0.16b, v4.16b
 ; CHECK-GI-NEXT:    mov v3.16b, v1.16b
 ; CHECK-GI-NEXT:    str wzr, [x1]
-; CHECK-GI-NEXT:  .LBB32_2: // %e
+; CHECK-GI-NEXT:  .LBB36_2: // %e
 ; CHECK-GI-NEXT:    mov v1.16b, v3.16b
 ; CHECK-GI-NEXT:    ret
 entry:
@@ -945,11 +1079,11 @@ e:
 define <2 x float> @tv2f32(i1 %c, ptr %p, <2 x float> %a, <2 x float> %b) {
 ; CHECK-LABEL: tv2f32:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB33_2
+; CHECK-NEXT:    tbz w0, #0, .LBB37_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    fmov d1, d0
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB33_2: // %e
+; CHECK-NEXT:  .LBB37_2: // %e
 ; CHECK-NEXT:    fmov d0, d1
 ; CHECK-NEXT:    ret
 entry:
@@ -965,11 +1099,11 @@ e:
 define <3 x float> @tv3f32(i1 %c, ptr %p, <3 x float> %a, <3 x float> %b) {
 ; CHECK-LABEL: tv3f32:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB34_2
+; CHECK-NEXT:    tbz w0, #0, .LBB38_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    mov v1.16b, v0.16b
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB34_2: // %e
+; CHECK-NEXT:  .LBB38_2: // %e
 ; CHECK-NEXT:    mov v0.16b, v1.16b
 ; CHECK-NEXT:    ret
 entry:
@@ -985,11 +1119,11 @@ e:
 define <4 x float> @tv4f32(i1 %c, ptr %p, <4 x float> %a, <4 x float> %b) {
 ; CHECK-LABEL: tv4f32:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB35_2
+; CHECK-NEXT:    tbz w0, #0, .LBB39_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    mov v1.16b, v0.16b
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB35_2: // %e
+; CHECK-NEXT:  .LBB39_2: // %e
 ; CHECK-NEXT:    mov v0.16b, v1.16b
 ; CHECK-NEXT:    ret
 entry:
@@ -1005,12 +1139,12 @@ e:
 define <8 x float> @tv8f32(i1 %c, ptr %p, <8 x float> %a, <8 x float> %b) {
 ; CHECK-SD-LABEL: tv8f32:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB36_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB40_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    mov v2.16b, v0.16b
 ; CHECK-SD-NEXT:    mov v3.16b, v1.16b
 ; CHECK-SD-NEXT:    str wzr, [x1]
-; CHECK-SD-NEXT:  .LBB36_2: // %e
+; CHECK-SD-NEXT:  .LBB40_2: // %e
 ; CHECK-SD-NEXT:    mov v0.16b, v2.16b
 ; CHECK-SD-NEXT:    mov v1.16b, v3.16b
 ; CHECK-SD-NEXT:    ret
@@ -1019,12 +1153,12 @@ define <8 x float> @tv8f32(i1 %c, ptr %p, <8 x float> %a, <8 x float> %b) {
 ; CHECK-GI:       // %bb.0: // %entry
 ; CHECK-GI-NEXT:    mov v4.16b, v0.16b
 ; CHECK-GI-NEXT:    mov v0.16b, v2.16b
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB36_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB40_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    mov v0.16b, v4.16b
 ; CHECK-GI-NEXT:    mov v3.16b, v1.16b
 ; CHECK-GI-NEXT:    str wzr, [x1]
-; CHECK-GI-NEXT:  .LBB36_2: // %e
+; CHECK-GI-NEXT:  .LBB40_2: // %e
 ; CHECK-GI-NEXT:    mov v1.16b, v3.16b
 ; CHECK-GI-NEXT:    ret
 entry:
@@ -1040,11 +1174,11 @@ e:
 define <2 x double> @tv2f64(i1 %c, ptr %p, <2 x double> %a, <2 x double> %b) {
 ; CHECK-LABEL: tv2f64:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    tbz w0, #0, .LBB37_2
+; CHECK-NEXT:    tbz w0, #0, .LBB41_2
 ; CHECK-NEXT:  // %bb.1: // %t
 ; CHECK-NEXT:    mov v1.16b, v0.16b
 ; CHECK-NEXT:    str wzr, [x1]
-; CHECK-NEXT:  .LBB37_2: // %e
+; CHECK-NEXT:  .LBB41_2: // %e
 ; CHECK-NEXT:    mov v0.16b, v1.16b
 ; CHECK-NEXT:    ret
 entry:
@@ -1060,13 +1194,13 @@ e:
 define <3 x double> @tv3f64(i1 %c, ptr %p, <3 x double> %a, <3 x double> %b) {
 ; CHECK-SD-LABEL: tv3f64:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB38_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB42_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    fmov d3, d0
 ; CHECK-SD-NEXT:    fmov d4, d1
 ; CHECK-SD-NEXT:    str wzr, [x1]
 ; CHECK-SD-NEXT:    fmov d5, d2
-; CHECK-SD-NEXT:  .LBB38_2: // %e
+; CHECK-SD-NEXT:  .LBB42_2: // %e
 ; CHECK-SD-NEXT:    fmov d0, d3
 ; CHECK-SD-NEXT:    fmov d1, d4
 ; CHECK-SD-NEXT:    fmov d2, d5
@@ -1076,7 +1210,7 @@ define <3 x double> @tv3f64(i1 %c, ptr %p, <3 x double> %a, <3 x double> %b) {
 ; CHECK-GI:       // %bb.0: // %entry
 ; CHECK-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
 ; CHECK-GI-NEXT:    // kill: def $d4 killed $d4 def $q4
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB38_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB42_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    fmov d6, d0
 ; CHECK-GI-NEXT:    fmov d7, d2
@@ -1088,7 +1222,7 @@ define <3 x double> @tv3f64(i1 %c, ptr %p, <3 x double> %a, <3 x double> %b) {
 ; CHECK-GI-NEXT:    mov v0.16b, v6.16b
 ; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-GI-NEXT:    ret
-; CHECK-GI-NEXT:  .LBB38_2:
+; CHECK-GI-NEXT:  .LBB42_2:
 ; CHECK-GI-NEXT:    fmov d0, d3
 ; CHECK-GI-NEXT:    fmov d2, d5
 ; CHECK-GI-NEXT:    // kill: def $d2 killed $d2 killed $q2
@@ -1109,12 +1243,12 @@ e:
 define <4 x double> @tv4f64(i1 %c, ptr %p, <4 x double> %a, <4 x double> %b) {
 ; CHECK-SD-LABEL: tv4f64:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB39_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB43_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    mov v2.16b, v0.16b
 ; CHECK-SD-NEXT:    mov v3.16b, v1.16b
 ; CHECK-SD-NEXT:    str wzr, [x1]
-; CHECK-SD-NEXT:  .LBB39_2: // %e
+; CHECK-SD-NEXT:  .LBB43_2: // %e
 ; CHECK-SD-NEXT:    mov v0.16b, v2.16b
 ; CHECK-SD-NEXT:    mov v1.16b, v3.16b
 ; CHECK-SD-NEXT:    ret
@@ -1123,12 +1257,12 @@ define <4 x double> @tv4f64(i1 %c, ptr %p, <4 x double> %a, <4 x double> %b) {
 ; CHECK-GI:       // %bb.0: // %entry
 ; CHECK-GI-NEXT:    mov v4.16b, v0.16b
 ; CHECK-GI-NEXT:    mov v0.16b, v2.16b
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB39_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB43_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    mov v0.16b, v4.16b
 ; CHECK-GI-NEXT:    mov v3.16b, v1.16b
 ; CHECK-GI-NEXT:    str wzr, [x1]
-; CHECK-GI-NEXT:  .LBB39_2: // %e
+; CHECK-GI-NEXT:  .LBB43_2: // %e
 ; CHECK-GI-NEXT:    mov v1.16b, v3.16b
 ; CHECK-GI-NEXT:    ret
 entry:
@@ -1144,30 +1278,30 @@ e:
 define <2 x fp128> @tv2f128(i1 %c, ptr %p, <2 x fp128> %a, <2 x fp128> %b) {
 ; CHECK-SD-LABEL: tv2f128:
 ; CHECK-SD:       // %bb.0: // %entry
-; CHECK-SD-NEXT:    tbz w0, #0, .LBB40_2
+; CHECK-SD-NEXT:    tbz w0, #0, .LBB44_2
 ; CHECK-SD-NEXT:  // %bb.1: // %t
 ; CHECK-SD-NEXT:    mov v2.16b, v0.16b
 ; CHECK-SD-NEXT:    mov v3.16b, v1.16b
 ; CHECK-SD-NEXT:    str wzr, [x1]
-; CHECK-SD-NEXT:  .LBB40_2: // %e
+; CHECK-SD-NEXT:  .LBB44_2: // %e
 ; CHECK-SD-NEXT:    mov v0.16b, v2.16b
 ; CHECK-SD-NEXT:    mov v1.16b, v3.16b
 ; CHECK-SD-NEXT:    ret
 ;
 ; CHECK-GI-LABEL: tv2f128:
 ; CHECK-GI:       // %bb.0: // %entry
-; CHECK-GI-NEXT:    tbz w0, #0, .LBB40_2
+; CHECK-GI-NEXT:    tbz w0, #0, .LBB44_2
 ; CHECK-GI-NEXT:  // %bb.1: // %t
 ; CHECK-GI-NEXT:    mov d4, v1.d[1]
 ; CHECK-GI-NEXT:    mov d5, v0.d[1]
 ; CHECK-GI-NEXT:    str wzr, [x1]
 ; CHECK-GI-NEXT:    fmov d2, d0
 ; CHECK-GI-NEXT:    fmov d3, d1
-; CHECK-GI-NEXT:    b .LBB40_3
-; CHECK-GI-NEXT:  .LBB40_2:
+; CHECK-GI-NEXT:    b .LBB44_3
+; CHECK-GI-NEXT:  .LBB44_2:
 ; CHECK-GI-NEXT:    mov d4, v3.d[1]
 ; CHECK-GI-NEXT:    mov d5, v2.d[1]
-; CHECK-GI-NEXT:  .LBB40_3: // %e
+; CHECK-GI-NEXT:  .LBB44_3: // %e
 ; CHECK-GI-NEXT:    fmov x8, d2
 ; CHECK-GI-NEXT:    fmov x9, d3
 ; CHECK-GI-NEXT:    mov v0.d[0], x8


        


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