[llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)
Artem Belevich via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 19 12:18:49 PST 2024
================
@@ -18754,8 +18754,9 @@ SDValue DAGCombiner::rebuildSetCC(SDValue N) {
if (LegalTypes)
SetCCVT = getSetCCResultType(SetCCVT);
// Replace the uses of XOR with SETCC
- return DAG.getSetCC(SDLoc(N), SetCCVT, Op0, Op1,
- Equal ? ISD::SETEQ : ISD::SETNE);
+ const ISD::CondCode CC = Equal ? ISD::SETEQ : ISD::SETNE;
+ if (!LegalOperations || TLI.isCondCodeLegal(CC, Op0.getSimpleValueType()))
----------------
Artem-B wrote:
This could definitely use a comment. AFAICT what we're doing here is "combine into setcc(NE/EQ) only if we know they are legal, which leaves xor(i1) untouched and allows us to use eventually use logic ops on predicates" .
Do we actually need to add this special case here?
It appears that we do manage to lower `setcc x, y, eq` as `xor.pred` already : https://godbolt.org/z/cMx9d8P33
What happens if we remove the change here?
https://github.com/llvm/llvm-project/pull/115035
More information about the llvm-commits
mailing list