[llvm] [SDAG] [X86] Extend SplitVecOp_VSETCC for STRICT_FSETCCS (PR #116768)
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Tue Nov 19 02:22:12 PST 2024
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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
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git-clang-format --diff 02b8ee281947f6cb39c7eb3c4bbba59322e9015b 79d4592e02738b614b1a72254ee7ce31be80ec4e --extensions cpp -- llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
index 8ac0835d71..d891e818ca 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -4238,8 +4238,7 @@ SDValue DAGTypeLegalizer::SplitVecOp_TruncateHelper(SDNode *N) {
SDValue DAGTypeLegalizer::SplitVecOp_VSETCC(SDNode *N) {
auto Opc = N->getOpcode();
- bool isStrict = Opc == ISD::STRICT_FSETCC ||
- Opc == ISD::STRICT_FSETCCS;
+ bool isStrict = Opc == ISD::STRICT_FSETCC || Opc == ISD::STRICT_FSETCCS;
assert(N->getValueType(0).isVector() &&
N->getOperand(isStrict ? 1 : 0).getValueType().isVector() &&
"Operand types must be vectors");
@@ -4258,13 +4257,10 @@ SDValue DAGTypeLegalizer::SplitVecOp_VSETCC(SDNode *N) {
if (Opc == ISD::SETCC) {
LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2));
HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2));
- } else if (Opc == ISD::STRICT_FSETCC ||
- Opc == ISD::STRICT_FSETCCS) {
- LoRes = DAG.getNode(Opc, DL,
- DAG.getVTList(PartResVT, N->getValueType(1)),
+ } else if (Opc == ISD::STRICT_FSETCC || Opc == ISD::STRICT_FSETCCS) {
+ LoRes = DAG.getNode(Opc, DL, DAG.getVTList(PartResVT, N->getValueType(1)),
N->getOperand(0), Lo0, Lo1, N->getOperand(3));
- HiRes = DAG.getNode(Opc, DL,
- DAG.getVTList(PartResVT, N->getValueType(1)),
+ HiRes = DAG.getNode(Opc, DL, DAG.getVTList(PartResVT, N->getValueType(1)),
N->getOperand(0), Hi0, Hi1, N->getOperand(3));
SDValue NewChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
LoRes.getValue(1), HiRes.getValue(1));
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https://github.com/llvm/llvm-project/pull/116768
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