[llvm] [AArch64][FEAT_CMPBR] Codegen for Armv9.6-a compare-and-branch (PR #116465)

[David Green via llvm-commits]

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@@ -13065,6 +13065,7 @@ class BaseCmpBranchRegister<RegisterClass regtype, bit sf, bits<3> cc,
       Sched<[WriteBr]> {
   let isBranch = 1;
   let isTerminator = 1;
+  let isCompare = 1;
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davemgreen wrote:

Do these need to be marked as compares? I believe we go through analyzeBranch. Same for the pseudos.

https://github.com/llvm/llvm-project/pull/116465