[llvm] 45e882e - [RISCV] Add IsRV32 to some isel patterns not needed for RV64.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2024-11-17T19:44:56-08:00
New Revision: 45e882e2bfdb62b5930c22687525e0d8f7788f03

URL: https://github.com/llvm/llvm-project/commit/45e882e2bfdb62b5930c22687525e0d8f7788f03
DIFF: https://github.com/llvm/llvm-project/commit/45e882e2bfdb62b5930c22687525e0d8f7788f03.diff

LOG: [RISCV] Add IsRV32 to some isel patterns not needed for RV64.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoF.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoF.td b/llvm/lib/Target/RISCV/RISCVInstrInfoF.td
index 0f2b0bb8a78c65..2c27e3950f07f9 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoF.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoF.td
@@ -708,13 +708,13 @@ def : LdPat<load, LW_INX, f32>;
 def : StPat<store, SW_INX, GPRF32, f32>;
 } // Predicates = [HasStdExtZfinx]
 
-let Predicates = [HasStdExtF] in {
+let Predicates = [HasStdExtF, IsRV32] in {
 // Moves (no conversion)
 def : Pat<(bitconvert (i32 GPR:$rs1)), (FMV_W_X GPR:$rs1)>;
 def : Pat<(i32 (bitconvert FPR32:$rs1)), (FMV_X_W FPR32:$rs1)>;
 } // Predicates = [HasStdExtF]
 
-let Predicates = [HasStdExtZfinx] in {
+let Predicates = [HasStdExtZfinx, IsRV32] in {
 // Moves (no conversion)
 def : Pat<(f32 (bitconvert (i32 GPR:$rs1))), (EXTRACT_SUBREG GPR:$rs1, sub_32)>;
 def : Pat<(i32 (bitconvert FPR32INX:$rs1)), (INSERT_SUBREG (XLenVT (IMPLICIT_DEF)), FPR32INX:$rs1, sub_32)>;