[llvm] [InstCombine] Re-queue users of phi when nsw/nuw flags of add are inferred (PR #113933)
Yingwei Zheng via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 17 07:37:32 PST 2024
https://github.com/dtcxzyw updated https://github.com/llvm/llvm-project/pull/113933
>From 60e65925e012f0092868e874d57a88362bd3cf10 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: Mon, 28 Oct 2024 15:46:25 +0800
Subject: [PATCH 1/3] [InstCombine] Add users of phi when nsw/nuw flags of add
are inferred
---
.../InstCombine/InstCombineAddSub.cpp | 7 ++++++
.../InstCombine/2007-10-31-RangeCrash.ll | 13 +++--------
llvm/test/Transforms/InstCombine/cast_phi.ll | 2 +-
.../SimpleLoopUnswitch/2007-08-01-LCSSA.ll | 23 +++++--------------
4 files changed, 17 insertions(+), 28 deletions(-)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
index 21588aca512758..cde3c4f3a630db 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
@@ -1868,6 +1868,13 @@ Instruction *InstCombinerImpl::visitAdd(BinaryOperator &I) {
if (Instruction *Res = foldBinOpOfSelectAndCastOfSelectCondition(I))
return Res;
+ if (Changed) {
+ for (User *U : I.users()) {
+ if (auto *PHI = dyn_cast<PHINode>(U))
+ Worklist.pushUsersToWorkList(*PHI);
+ }
+ }
+
return Changed ? &I : nullptr;
}
diff --git a/llvm/test/Transforms/InstCombine/2007-10-31-RangeCrash.ll b/llvm/test/Transforms/InstCombine/2007-10-31-RangeCrash.ll
index b5ae08e1daa3af..3936d027de599d 100644
--- a/llvm/test/Transforms/InstCombine/2007-10-31-RangeCrash.ll
+++ b/llvm/test/Transforms/InstCombine/2007-10-31-RangeCrash.ll
@@ -1,25 +1,18 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt < %s -S -passes=instcombine | FileCheck %s
-; We do not reach a fixpoint, because we first have to infer nsw on the IV add,
-; and could eliminate the icmp slt afterwards, but don't revisit it.
-
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
-define i32 @test() "instcombine-no-verify-fixpoint" {
-; CHECK-LABEL: define i32 @test(
-; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
+define i32 @test() {
+; CHECK-LABEL: define i32 @test() {
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 true, label [[BB_I:%.*]], label [[CALCULATECOLORSPECIFICBLACKLEVEL_EXIT:%.*]]
; CHECK: bb.i:
; CHECK-NEXT: br label [[BB51_I_I:%.*]]
; CHECK: bb27.i.i:
-; CHECK-NEXT: [[TMP50_I_I:%.*]] = add nsw i32 [[X_0_I_I:%.*]], 2
; CHECK-NEXT: br label [[BB51_I_I]]
; CHECK: bb51.i.i:
-; CHECK-NEXT: [[X_0_I_I]] = phi i32 [ [[TMP50_I_I]], [[BB27_I_I:%.*]] ], [ 0, [[BB_I]] ]
-; CHECK-NEXT: [[TMP54_I_I:%.*]] = icmp slt i32 [[X_0_I_I]], 0
-; CHECK-NEXT: br i1 [[TMP54_I_I]], label [[BB27_I_I]], label [[BB57_I_I:%.*]]
+; CHECK-NEXT: br i1 false, label [[BB27_I_I:%.*]], label [[BB57_I_I:%.*]]
; CHECK: bb57.i.i:
; CHECK-NEXT: ret i32 0
; CHECK: calculateColorSpecificBlackLevel.exit:
diff --git a/llvm/test/Transforms/InstCombine/cast_phi.ll b/llvm/test/Transforms/InstCombine/cast_phi.ll
index 6b05edc31deb87..a457e520d30cd6 100644
--- a/llvm/test/Transforms/InstCombine/cast_phi.ll
+++ b/llvm/test/Transforms/InstCombine/cast_phi.ll
@@ -316,7 +316,7 @@ define i8 @trunc_in_loop_exit_block() "instcombine-no-verify-fixpoint" {
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[IV_NEXT]], [[LOOP_LATCH]] ]
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[IV]], 100
+; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i32 [[IV]], 100
; CHECK-NEXT: br i1 [[CMP]], label [[LOOP_LATCH]], label [[EXIT:%.*]]
; CHECK: loop.latch:
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
diff --git a/llvm/test/Transforms/SimpleLoopUnswitch/2007-08-01-LCSSA.ll b/llvm/test/Transforms/SimpleLoopUnswitch/2007-08-01-LCSSA.ll
index fb342322b2da7a..1ad57ce936bb9b 100644
--- a/llvm/test/Transforms/SimpleLoopUnswitch/2007-08-01-LCSSA.ll
+++ b/llvm/test/Transforms/SimpleLoopUnswitch/2007-08-01-LCSSA.ll
@@ -1,40 +1,29 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt < %s -S -passes='loop(simple-loop-unswitch),instcombine' -verify-memoryssa | FileCheck %s
-; We do not reach a fixpoint, because we first have to infer nsw on the IV add,
-; and could eliminate the icmp slt afterwards, but don't revisit it.
-
@.str9 = external constant [1 x i8]
declare i32 @strcmp(ptr, ptr)
-define i32 @_ZN9Generator6strregEPKc(ptr %this, ptr %s) "instcombine-no-verify-fixpoint" {
+define i32 @_ZN9Generator6strregEPKc(ptr %this, ptr %s) {
; CHECK-LABEL: define i32 @_ZN9Generator6strregEPKc(
-; CHECK-SAME: ptr [[THIS:%.*]], ptr [[S:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-SAME: ptr [[THIS:%.*]], ptr [[S:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP122:%.*]] = icmp eq ptr [[S]], null
; CHECK-NEXT: br label [[BB184:%.*]]
; CHECK: bb55:
; CHECK-NEXT: ret i32 0
; CHECK: bb88:
-; CHECK-NEXT: br i1 [[TMP122]], label [[BB154:%.*]], label [[BB128:%.*]]
+; CHECK-NEXT: br i1 poison, label [[BB154:%.*]], label [[BB128:%.*]]
; CHECK: bb128:
-; CHECK-NEXT: [[TMP138:%.*]] = call i32 @strcmp(ptr noundef nonnull dereferenceable(1) null, ptr noundef nonnull dereferenceable(1) [[S]])
-; CHECK-NEXT: [[IFTMP_37_0_IN4:%.*]] = icmp eq i32 [[TMP138]], 0
-; CHECK-NEXT: br i1 [[IFTMP_37_0_IN4]], label [[BB250:%.*]], label [[BB166:%.*]]
+; CHECK-NEXT: br i1 poison, label [[BB250:%.*]], label [[BB166:%.*]]
; CHECK: bb154:
; CHECK-NEXT: br i1 false, label [[BB250]], label [[BB166]]
; CHECK: bb166:
-; CHECK-NEXT: [[TMP175:%.*]] = add i32 [[IDX_0:%.*]], 1
-; CHECK-NEXT: [[TMP183:%.*]] = add nsw i32 [[I33_0:%.*]], 1
; CHECK-NEXT: br label [[BB184]]
; CHECK: bb184:
-; CHECK-NEXT: [[I33_0]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP183]], [[BB166]] ]
-; CHECK-NEXT: [[IDX_0]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP175]], [[BB166]] ]
-; CHECK-NEXT: [[TMP49:%.*]] = icmp slt i32 [[I33_0]], 0
-; CHECK-NEXT: br i1 [[TMP49]], label [[BB88:%.*]], label [[BB55:%.*]]
+; CHECK-NEXT: br i1 false, label [[BB88:%.*]], label [[BB55:%.*]]
; CHECK: bb250:
-; CHECK-NEXT: ret i32 [[IDX_0]]
+; CHECK-NEXT: ret i32 poison
;
entry:
%s_addr.0 = select i1 false, ptr @.str9, ptr %s
>From d2a5040ad25ae182550bb7d8f024aeed5d031c98 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: Sat, 16 Nov 2024 18:13:49 +0800
Subject: [PATCH 2/3] [InstCombine] Address review comments.
---
llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
index cde3c4f3a630db..fa6619a9f34521 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
@@ -1868,7 +1868,9 @@ Instruction *InstCombinerImpl::visitAdd(BinaryOperator &I) {
if (Instruction *Res = foldBinOpOfSelectAndCastOfSelectCondition(I))
return Res;
- if (Changed) {
+ // Re-enqueue add instruction with PHI operands if we infer new nuw/nsw flags.
+ if (Changed &&
+ (isa<PHINode>(I.getOperand(0)) || isa<PHINode>(I.getOperand(1)))) {
for (User *U : I.users()) {
if (auto *PHI = dyn_cast<PHINode>(U))
Worklist.pushUsersToWorkList(*PHI);
>From 890632eb4510b434d94a9e93f4b86c80c5180932 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: Sun, 17 Nov 2024 23:36:10 +0800
Subject: [PATCH 3/3] [InstCombine] Use `matchSimpleRecurrence`
---
.../Transforms/InstCombine/InstCombineAddSub.cpp | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
index fa6619a9f34521..c77dbbe59796a9 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
@@ -1868,13 +1868,13 @@ Instruction *InstCombinerImpl::visitAdd(BinaryOperator &I) {
if (Instruction *Res = foldBinOpOfSelectAndCastOfSelectCondition(I))
return Res;
- // Re-enqueue add instruction with PHI operands if we infer new nuw/nsw flags.
- if (Changed &&
- (isa<PHINode>(I.getOperand(0)) || isa<PHINode>(I.getOperand(1)))) {
- for (User *U : I.users()) {
- if (auto *PHI = dyn_cast<PHINode>(U))
- Worklist.pushUsersToWorkList(*PHI);
- }
+ // Re-enqueue the induction variable of add recurrence if we infer new
+ // nuw/nsw flags.
+ if (Changed) {
+ PHINode *PHI;
+ Value *Start, *Step;
+ if (matchSimpleRecurrence(&I, PHI, Start, Step))
+ Worklist.pushUsersToWorkList(*PHI);
}
return Changed ? &I : nullptr;
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