[llvm] [llvm][aarch64][x86] Implement a lightweight spectre v1 mitigation, like MSVC /Qspectre (PR #116450)
Kristof Beyls via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 17 01:48:58 PST 2024
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@@ -885,6 +885,9 @@ def int_readcyclecounter : DefaultAttrsIntrinsic<[llvm_i64_ty]>;
def int_readsteadycounter : DefaultAttrsIntrinsic<[llvm_i64_ty]>;
+def int_speculative_data_barrier : DefaultAttrsIntrinsic<[], [],
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kbeyls wrote:
This new intrinsic needs good documentation in the LLVM LangRef of what the semantics are that it implies.
More concretely, the semantics of `lfence` and `csdb` is very different, so it's unlikely that an intrinsic could correctly lower to both on different architectures.
Without having looked in detail, I'm guessing that the lowering to `csdb` isn't having the effect that you're intending this pass to have.
https://github.com/llvm/llvm-project/pull/116450
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