[llvm] [CodeGen] Fix return types of TC_RETURN for several targets (PR #116504)
via llvm-commits
llvm-commits at lists.llvm.org
Sat Nov 16 12:05:37 PST 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-arm
@llvm/pr-subscribers-backend-aarch64
Author: Sergei Barannikov (s-barannikov)
<details>
<summary>Changes</summary>
TC_RETURN nodes do not have a glue result.
---
Full diff: https://github.com/llvm/llvm-project/pull/116504.diff
7 Files Affected:
- (modified) llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (+2-4)
- (modified) llvm/lib/Target/AMDGPU/SIISelLowering.cpp (+2-4)
- (modified) llvm/lib/Target/ARM/ARMISelLowering.cpp (+2-3)
- (modified) llvm/lib/Target/Hexagon/HexagonISelLowering.cpp (+2-3)
- (modified) llvm/lib/Target/M68k/M68kISelLowering.cpp (+2-3)
- (modified) llvm/lib/Target/Sparc/SparcInstrInfo.td (+1-2)
- (modified) llvm/lib/Target/X86/X86ISelLoweringCall.cpp (+3-3)
``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 4a9bd819cd2d76..2732e495c552a6 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -9353,13 +9353,11 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
if (InGlue.getNode())
Ops.push_back(InGlue);
- SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
-
// If we're doing a tall call, use a TC_RETURN here rather than an
// actual call instruction.
if (IsTailCall) {
MF.getFrameInfo().setHasTailCall();
- SDValue Ret = DAG.getNode(Opc, DL, NodeTys, Ops);
+ SDValue Ret = DAG.getNode(Opc, DL, MVT::Other, Ops);
if (IsCFICall)
Ret.getNode()->setCFIType(CLI.CFIType->getZExtValue());
@@ -9369,7 +9367,7 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
}
// Returns a chain and a flag for retval copy to use.
- Chain = DAG.getNode(Opc, DL, NodeTys, Ops);
+ Chain = DAG.getNode(Opc, DL, {MVT::Other, MVT::Glue}, Ops);
if (IsCFICall)
Chain.getNode()->setCFIType(CLI.CFIType->getZExtValue());
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index b186dafb4c0ded..1e261f4256c93b 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -3942,8 +3942,6 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
if (InGlue)
Ops.push_back(InGlue);
- SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
-
// If we're doing a tall call, use a TC_RETURN here rather than an
// actual call instruction.
if (IsTailCall) {
@@ -3959,11 +3957,11 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
break;
}
- return DAG.getNode(OPC, DL, NodeTys, Ops);
+ return DAG.getNode(OPC, DL, MVT::Other, Ops);
}
// Returns a chain and a flag for retval copy to use.
- SDValue Call = DAG.getNode(AMDGPUISD::CALL, DL, NodeTys, Ops);
+ SDValue Call = DAG.getNode(AMDGPUISD::CALL, DL, {MVT::Other, MVT::Glue}, Ops);
Chain = Call.getValue(0);
InGlue = Call.getValue(1);
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 2b4c18b84132d3..7fce91f97f3618 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -3002,17 +3002,16 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
if (InGlue.getNode())
Ops.push_back(InGlue);
- SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
if (isTailCall) {
MF.getFrameInfo().setHasTailCall();
- SDValue Ret = DAG.getNode(ARMISD::TC_RETURN, dl, NodeTys, Ops);
+ SDValue Ret = DAG.getNode(ARMISD::TC_RETURN, dl, MVT::Other, Ops);
DAG.addNoMergeSiteInfo(Ret.getNode(), CLI.NoMerge);
DAG.addCallSiteInfo(Ret.getNode(), std::move(CSInfo));
return Ret;
}
// Returns a chain and a flag for retval copy to use.
- Chain = DAG.getNode(CallOpc, dl, NodeTys, Ops);
+ Chain = DAG.getNode(CallOpc, dl, {MVT::Other, MVT::Glue}, Ops);
DAG.addNoMergeSiteInfo(Chain.getNode(), CLI.NoMerge);
InGlue = Chain.getValue(1);
DAG.addCallSiteInfo(Chain.getNode(), std::move(CSInfo));
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
index ab9bc559367787..f109796e6101c5 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
@@ -580,7 +580,6 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
}
// Returns a chain & a flag for retval copy to use.
- SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
SmallVector<SDValue, 8> Ops;
Ops.push_back(Chain);
Ops.push_back(Callee);
@@ -599,7 +598,7 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
if (CLI.IsTailCall) {
MFI.setHasTailCall();
- return DAG.getNode(HexagonISD::TC_RETURN, dl, NodeTys, Ops);
+ return DAG.getNode(HexagonISD::TC_RETURN, dl, MVT::Other, Ops);
}
// Set this here because we need to know this for "hasFP" in frame lowering.
@@ -608,7 +607,7 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
MFI.setHasCalls(true);
unsigned OpCode = DoesNotReturn ? HexagonISD::CALLnr : HexagonISD::CALL;
- Chain = DAG.getNode(OpCode, dl, NodeTys, Ops);
+ Chain = DAG.getNode(OpCode, dl, {MVT::Other, MVT::Glue}, Ops);
Glue = Chain.getValue(1);
// Create the CALLSEQ_END node.
diff --git a/llvm/lib/Target/M68k/M68kISelLowering.cpp b/llvm/lib/Target/M68k/M68kISelLowering.cpp
index 316a6eebc2db0f..2f2b1ee2806368 100644
--- a/llvm/lib/Target/M68k/M68kISelLowering.cpp
+++ b/llvm/lib/Target/M68k/M68kISelLowering.cpp
@@ -811,7 +811,6 @@ SDValue M68kTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
}
// Returns a chain & a flag for retval copy to use.
- SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
SmallVector<SDValue, 8> Ops;
if (!IsSibcall && IsTailCall) {
@@ -842,10 +841,10 @@ SDValue M68kTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
if (IsTailCall) {
MF.getFrameInfo().setHasTailCall();
- return DAG.getNode(M68kISD::TC_RETURN, DL, NodeTys, Ops);
+ return DAG.getNode(M68kISD::TC_RETURN, DL, MVT::Other, Ops);
}
- Chain = DAG.getNode(M68kISD::CALL, DL, NodeTys, Ops);
+ Chain = DAG.getNode(M68kISD::CALL, DL, {MVT::Other, MVT::Glue}, Ops);
InGlue = Chain.getValue(1);
// Create the CALLSEQ_END node.
diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.td b/llvm/lib/Target/Sparc/SparcInstrInfo.td
index 7b074231ec62ee..38fd683832f0db 100644
--- a/llvm/lib/Target/Sparc/SparcInstrInfo.td
+++ b/llvm/lib/Target/Sparc/SparcInstrInfo.td
@@ -312,8 +312,7 @@ def call : SDNode<"SPISD::CALL", SDT_SPCall,
SDNPVariadic]>;
def tailcall : SDNode<"SPISD::TAIL_CALL", SDT_SPCall,
- [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue,
- SDNPVariadic]>;
+ [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
def SDT_SPRet : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>;
def retglue : SDNode<"SPISD::RET_GLUE", SDT_SPRet,
diff --git a/llvm/lib/Target/X86/X86ISelLoweringCall.cpp b/llvm/lib/Target/X86/X86ISelLoweringCall.cpp
index 084bd479f9a623..3bf61f22c9f1f4 100644
--- a/llvm/lib/Target/X86/X86ISelLoweringCall.cpp
+++ b/llvm/lib/Target/X86/X86ISelLoweringCall.cpp
@@ -2417,8 +2417,6 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
Callee = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i64, Callee);
}
- // Returns a chain & a glue for retval copy to use.
- SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
SmallVector<SDValue, 8> Ops;
if (!IsSibcall && isTailCall && !IsMustTail) {
@@ -2523,7 +2521,7 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
// should be computed from returns not tail calls. Consider a void
// function making a tail call to a function returning int.
MF.getFrameInfo().setHasTailCall();
- SDValue Ret = DAG.getNode(X86ISD::TC_RETURN, dl, NodeTys, Ops);
+ SDValue Ret = DAG.getNode(X86ISD::TC_RETURN, dl, MVT::Other, Ops);
if (IsCFICall)
Ret.getNode()->setCFIType(CLI.CFIType->getZExtValue());
@@ -2533,6 +2531,8 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
return Ret;
}
+ // Returns a chain & a glue for retval copy to use.
+ SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
if (HasNoCfCheck && IsCFProtectionSupported && IsIndirectCall) {
Chain = DAG.getNode(X86ISD::NT_CALL, dl, NodeTys, Ops);
} else if (CLI.CB && objcarc::hasAttachedCallOpBundle(CLI.CB)) {
``````````
</details>
https://github.com/llvm/llvm-project/pull/116504
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