[llvm] [AMDGPU] Implement hasBitTest to Optimize Bit Testing Operations (PR #112652)

[Harrison Hao via llvm-commits]

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@@ -16890,3 +16890,28 @@ SITargetLowering::lowerIdempotentRMWIntoFencedLoad(AtomicRMWInst *AI) const {
   AI->eraseFromParent();
   return LI;
 }
+
+bool SITargetLowering::hasBitTest(SDValue X, SDValue Y) const {
+  if (X->isDivergent() || Y->isDivergent())
+    return false;
+
+  EVT VT = X.getValueType();
+
+  if (VT != MVT::i32 && VT != MVT::i64)
+    return false;
+
+  if (VT.isVector()) {
+    EVT ScalarType = VT.getScalarType();
+    if (ScalarType != MVT::i32 && ScalarType != MVT::i64)
+      return false;
+  }
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harrisonGPU wrote:

Okay, I have updated it, what do you think about it?

https://github.com/llvm/llvm-project/pull/112652