[llvm] Fixed un-renamed CodeGenTargetMachineImpl Intheritances in Experimental Targets (PR #116290)
Matin Raayai via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 14 14:32:03 PST 2024
https://github.com/matinraayai created https://github.com/llvm/llvm-project/pull/116290
This PR fixes a set of build issues with experimental targets happened in result of merging #111234 to master.
>From 5d1bdda62bc73bedbe731d7bcdb77e37de41bff1 Mon Sep 17 00:00:00 2001
From: matinraayai <30674652+matinraayai at users.noreply.github.com>
Date: Thu, 14 Nov 2024 17:28:56 -0500
Subject: [PATCH] Fixed un-renamed CodeGenTargetMachineImpl inheritances in the
experimental targets.
---
llvm/include/llvm/CodeGen/TargetPassConfig.h | 2 +-
llvm/include/llvm/Passes/CodeGenPassBuilder.h | 3 ++-
llvm/lib/Target/ARC/ARCTargetMachine.cpp | 11 ++++++-----
llvm/lib/Target/CSKY/CSKYTargetMachine.cpp | 6 +++---
llvm/lib/Target/DirectX/DirectXTargetMachine.cpp | 2 +-
llvm/lib/Target/M68k/M68kTargetMachine.cpp | 6 +++---
.../Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp | 4 ++--
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 4 ++--
llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp | 7 ++++---
9 files changed, 24 insertions(+), 21 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h b/llvm/include/llvm/CodeGen/TargetPassConfig.h
index 85f87de521855f..a709ecf23f3bf2 100644
--- a/llvm/include/llvm/CodeGen/TargetPassConfig.h
+++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h
@@ -413,7 +413,7 @@ class TargetPassConfig : public ImmutablePass {
virtual void addFastRegAlloc();
/// addOptimizedRegAlloc - Add passes related to register allocation.
- /// CodeGenCommonTMImpl provides standard regalloc passes for most targets.
+ /// CodeGenTargetMachineImpl provides standard regalloc passes for most targets.
virtual void addOptimizedRegAlloc();
/// addPreRewrite - Add passes to the optimized register allocation pipeline
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index d04387535db0da..7fa6fa118fe551 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -443,7 +443,8 @@ template <typename DerivedT, typename TargetMachineT> class CodeGenPassBuilder {
Error addFastRegAlloc(AddMachinePass &) const;
/// addOptimizedRegAlloc - Add passes related to register allocation.
- /// CodeGenCommonTMImpl provides standard regalloc passes for most targets.
+ /// CodeGenTargetMachineImpl provides standard regalloc passes for most
+ /// targets.
void addOptimizedRegAlloc(AddMachinePass &) const;
/// Add passes that optimize machine instructions after register allocation.
diff --git a/llvm/lib/Target/ARC/ARCTargetMachine.cpp b/llvm/lib/Target/ARC/ARCTargetMachine.cpp
index df8c96a4d97935..57e0177cd37486 100644
--- a/llvm/lib/Target/ARC/ARCTargetMachine.cpp
+++ b/llvm/lib/Target/ARC/ARCTargetMachine.cpp
@@ -33,11 +33,12 @@ ARCTargetMachine::ARCTargetMachine(const Target &T, const Triple &TT,
std::optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM,
CodeGenOptLevel OL, bool JIT)
- : CodeGenCommonTMImpl(T,
- "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
- "f32:32:32-i64:32-f64:32-a:0:32-n32",
- TT, CPU, FS, Options, getRelocModel(RM),
- getEffectiveCodeModel(CM, CodeModel::Small), OL),
+ : CodeGenTargetMachineImpl(
+ T,
+ "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
+ "f32:32:32-i64:32-f64:32-a:0:32-n32",
+ TT, CPU, FS, Options, getRelocModel(RM),
+ getEffectiveCodeModel(CM, CodeModel::Small), OL),
TLOF(std::make_unique<TargetLoweringObjectFileELF>()),
Subtarget(TT, std::string(CPU), std::string(FS), *this) {
initAsmInfo();
diff --git a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
index c256bb2d6a4cdd..ae6ef89fdcd072 100644
--- a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
+++ b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
@@ -54,9 +54,9 @@ CSKYTargetMachine::CSKYTargetMachine(const Target &T, const Triple &TT,
std::optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM,
CodeGenOptLevel OL, bool JIT)
- : CodeGenCommonTMImpl(T, computeDataLayout(TT), TT, CPU, FS, Options,
- RM.value_or(Reloc::Static),
- getEffectiveCodeModel(CM, CodeModel::Small), OL),
+ : CodeGenTargetMachineImpl(T, computeDataLayout(TT), TT, CPU, FS, Options,
+ RM.value_or(Reloc::Static),
+ getEffectiveCodeModel(CM, CodeModel::Small), OL),
TLOF(std::make_unique<CSKYELFTargetObjectFile>()) {
initAsmInfo();
}
diff --git a/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp b/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
index 914aee4f8b4b9d..655427a3e80209 100644
--- a/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
+++ b/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
@@ -108,7 +108,7 @@ DirectXTargetMachine::DirectXTargetMachine(const Target &T, const Triple &TT,
std::optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM,
CodeGenOptLevel OL, bool JIT)
- : CodeGenCommonTMImpl(
+ : CodeGenTargetMachineImpl(
T,
"e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-"
"f32:32-f64:64-n8:16:32:64",
diff --git a/llvm/lib/Target/M68k/M68kTargetMachine.cpp b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
index ce5970c5ec95da..2f5a2e8288a261 100644
--- a/llvm/lib/Target/M68k/M68kTargetMachine.cpp
+++ b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
@@ -100,9 +100,9 @@ M68kTargetMachine::M68kTargetMachine(const Target &T, const Triple &TT,
std::optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM,
CodeGenOptLevel OL, bool JIT)
- : CodeGenCommonTMImpl(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
- Options, getEffectiveRelocModel(TT, RM),
- ::getEffectiveCodeModel(CM, JIT), OL),
+ : CodeGenTargetMachineImpl(T, computeDataLayout(TT, CPU, Options), TT, CPU,
+ FS, Options, getEffectiveRelocModel(TT, RM),
+ ::getEffectiveCodeModel(CM, JIT), OL),
TLOF(std::make_unique<M68kELFTargetObjectFile>()),
Subtarget(TT, CPU, FS, *this) {
initAsmInfo();
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index a388b44b3ac837..e547e62094404f 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -805,8 +805,8 @@ MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
ELFObjectWriter &W = getStreamer().getWriter();
// It's possible that MCObjectFileInfo isn't fully initialized at this point
- // due to an initialization order problem where CodeGenCommonTMImpl creates
- // the target streamer before TargetLoweringObjectFile calls
+ // due to an initialization order problem where CodeGenTargetMachineImpl
+ // creates the target streamer before TargetLoweringObjectFile calls
// InitializeMCObjectFileInfo. There doesn't seem to be a single place that
// covers all cases so this statement covers most cases and direct object
// emission must call setPic() once MCObjectFileInfo has been initialized. The
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index 1f6866383e6067..2b64ab9aa6973d 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -345,8 +345,8 @@ static ScheduleDAGInstrs *createPPCPostMachineScheduler(
// The FeatureString here is a little subtle. We are modifying the feature
// string with what are (currently) non-function specific overrides as it goes
-// into the CodeGenCommonTMImpl constructor and then using the stored value in
-// the Subtarget constructor below it.
+// into the CodeGenTargetMachineImpl constructor and then using the stored value
+// in the Subtarget constructor below it.
PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
diff --git a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
index 7fb998d615c464..634ada375a3dc1 100644
--- a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
@@ -50,9 +50,10 @@ XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT,
std::optional<CodeModel::Model> CM,
CodeGenOptLevel OL, bool JIT,
bool IsLittle)
- : CodeGenCommonTMImpl(T, computeDataLayout(TT, CPU, Options, IsLittle), TT,
- CPU, FS, Options, getEffectiveRelocModel(JIT, RM),
- getEffectiveCodeModel(CM, CodeModel::Small), OL),
+ : CodeGenTargetMachineImpl(T, computeDataLayout(TT, CPU, Options, IsLittle),
+ TT, CPU, FS, Options,
+ getEffectiveRelocModel(JIT, RM),
+ getEffectiveCodeModel(CM, CodeModel::Small), OL),
TLOF(std::make_unique<TargetLoweringObjectFileELF>()) {
initAsmInfo();
}
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