[llvm] 6f5a145 - [RISCV][GISel] Remove isel pattern that is no longer tested after other recent changes.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2024-11-14T10:16:12-08:00
New Revision: 6f5a145aebee4a925da28d409d69ec7f4ea19f40

URL: https://github.com/llvm/llvm-project/commit/6f5a145aebee4a925da28d409d69ec7f4ea19f40
DIFF: https://github.com/llvm/llvm-project/commit/6f5a145aebee4a925da28d409d69ec7f4ea19f40.diff

LOG: [RISCV][GISel] Remove isel pattern that is no longer tested after other recent changes.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVGISel.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVGISel.td b/llvm/lib/Target/RISCV/RISCVGISel.td
index cee9140a1ba820..d0fbe4d51b7d76 100644
--- a/llvm/lib/Target/RISCV/RISCVGISel.td
+++ b/llvm/lib/Target/RISCV/RISCVGISel.td
@@ -169,12 +169,6 @@ def : LdPat<load, LD, PtrVT>;
 def : StPat<store, SD, GPR, PtrVT>;
 }
 
-let Predicates = [IsRV64] in {
-// FIXME: Temporary until i32->i64 zext is no longer legal.
-def : Pat <(srl (zext GPR:$rs1), uimm5:$shamt),
-           (SRLIW GPR:$rs1, uimm5:$shamt)>;
-}
-
 //===----------------------------------------------------------------------===//
 // RV64 i32 patterns not used by SelectionDAG
 //===----------------------------------------------------------------------===//