[llvm] [AArch64] Generate zeroing forms of certain SVE2.2 instructions (1/11) (PR #116259)

[Paul Walker via llvm-commits]

================
@@ -381,6 +381,9 @@ def NoUseScalarIncVL : Predicate<"!Subtarget->useScalarIncVL()">;
 
 def UseSVEFPLD1R : Predicate<"!Subtarget->noSVEFPLD1R()">;
 
+def UseUnaryUndefPseudos
+    : Predicate<"!(Subtarget->hasSVE2() || (Subtarget->isStreaming() && Subtarget->hasSME2()))">;
----------------
paulwalker-arm wrote:

This looks like  `!HasSVE2orSME2` rather than the intended `!HasSVE2p2orSME2p2`?

https://github.com/llvm/llvm-project/pull/116259