[llvm] be15fd5 - [InitUndef] handleSubReg should skip artificial subregs. (#116248)

[via llvm-commits]

Author: Sander de Smalen
Date: 2024-11-14T17:06:40Z
New Revision: be15fd5085680cc5ed9ec4f4f2258b504cdd55db

URL: https://github.com/llvm/llvm-project/commit/be15fd5085680cc5ed9ec4f4f2258b504cdd55db
DIFF: https://github.com/llvm/llvm-project/commit/be15fd5085680cc5ed9ec4f4f2258b504cdd55db.diff

LOG: [InitUndef] handleSubReg should skip artificial subregs. (#116248)

When enabling subreg liveness tracking for AArch64, this pass fails
because it tries to get the register class for the artificial subreg
`sub_32_hi` of a 64-bit GPR. It tries to create an INIT_UNDEF
instruction for the top 32-bits of the 64-bit GPR, which are not
directly addressable, so getSubRegisterClass() returns a nullptr,
crashing this pass.

It should instead just avoid trying to create the INIT_UNDEF
instruction.

Added: 
    

Modified: 
    llvm/lib/CodeGen/InitUndef.cpp
    llvm/test/CodeGen/AArch64/init-undef.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/InitUndef.cpp b/llvm/lib/CodeGen/InitUndef.cpp
index d4ac131a32a959..d8b3190f31003e 100644
--- a/llvm/lib/CodeGen/InitUndef.cpp
+++ b/llvm/lib/CodeGen/InitUndef.cpp
@@ -164,6 +164,14 @@ bool InitUndef::handleSubReg(MachineFunction &MF, MachineInstr &MI,
     TRI->getCoveringSubRegIndexes(*MRI, TargetRegClass, NeedDef,
                                   SubRegIndexNeedInsert);
 
+    // It's not possible to create the INIT_UNDEF when there is no register
+    // class associated for the subreg. This may happen for artificial subregs
+    // that are not directly addressable.
+    if (any_of(SubRegIndexNeedInsert, [&](unsigned Ind) -> bool {
+          return !TRI->getSubRegisterClass(TargetRegClass, Ind);
+        }))
+      continue;
+
     Register LatestReg = Reg;
     for (auto ind : SubRegIndexNeedInsert) {
       Changed = true;

diff  --git a/llvm/test/CodeGen/AArch64/init-undef.mir b/llvm/test/CodeGen/AArch64/init-undef.mir
index 7935c09d7df5ec..c9d23006d35234 100644
--- a/llvm/test/CodeGen/AArch64/init-undef.mir
+++ b/llvm/test/CodeGen/AArch64/init-undef.mir
@@ -1,5 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: llc -mtriple=aarch64-- -run-pass=init-undef -o - %s | FileCheck %s
+# RUN: llc -mtriple=aarch64-- -aarch64-enable-subreg-liveness-tracking=false -run-pass=init-undef -o - %s | FileCheck %s
+# RUN: llc -mtriple=aarch64-- -aarch64-enable-subreg-liveness-tracking=true -run-pass=init-undef -o - %s | FileCheck %s
 
 ---
 name:            test_stxp_undef