[llvm] [AArch64][NFC] Fixup assembler directive tests for SVE/SME (PR #116253)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 14 08:23:34 PST 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-mc
Author: None (SpencerAbson)
<details>
<summary>Changes</summary>
The assembler directives `.arch` and `.cpu` have been miss-used in tests since [this bug ](https://bugs.llvm.org/show_bug.cgi?id=32873) was fixed ([relevant patch for `.arch`](https://github.com/llvm/llvm-project/commit/a499d675ae163429adff0bc3dc4f8215c12441c7#diff-978708f6b40d44a13bced2d3050ddcd01f4a2423ca34ac0e26fb2ff2a83cc885R6943)).
This patch fixes the existing tests, unifies the file structure for these tests, and adds coverage for `sme-f16f16`, `sme-f8f16`, and `sme-f8f32`.
Tests using `sve-b16b16`/`sme-b16b16` have been moved to the MC/AArch64/SME2 folder, as this is where the relevant instructions are tested.
---
Patch is 52.04 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/116253.diff
50 Files Affected:
- (modified) llvm/test/MC/AArch64/FP8/directive-arch-negative.s (+36-30)
- (modified) llvm/test/MC/AArch64/FP8/directive-arch.s (+12-9)
- (added) llvm/test/MC/AArch64/FP8/directive-arch_extension-negative.s (+68)
- (added) llvm/test/MC/AArch64/FP8/directive-arch_extension.s (+50)
- (added) llvm/test/MC/AArch64/FP8/directive-cpu-neagtive.s (+61)
- (added) llvm/test/MC/AArch64/FP8/directive-cpu.s (+49)
- (added) llvm/test/MC/AArch64/SME/directive-arch-negative.s (+16)
- (added) llvm/test/MC/AArch64/SME/directive-arch.s (+15)
- (added) llvm/test/MC/AArch64/SME/directive-arch_extension-negative.s (+19)
- (added) llvm/test/MC/AArch64/SME/directive-arch_extension.s (+16)
- (added) llvm/test/MC/AArch64/SME/directive-cpu-negative.s (+16)
- (added) llvm/test/MC/AArch64/SME/directive-cpu.s (+15)
- (removed) llvm/test/MC/AArch64/SME/directives-negative.s (-37)
- (removed) llvm/test/MC/AArch64/SME/directives.s (-35)
- (added) llvm/test/MC/AArch64/SME2/directive-arch-negative.s (+22)
- (modified) llvm/test/MC/AArch64/SME2/directive-arch.s (+12-3)
- (added) llvm/test/MC/AArch64/SME2/directive-arch_extension-negative.s (+27)
- (added) llvm/test/MC/AArch64/SME2/directive-arch_extension.s (+18)
- (added) llvm/test/MC/AArch64/SME2/directive-cpu-negative.s (+22)
- (added) llvm/test/MC/AArch64/SME2/directive-cpu.s (+18)
- (modified) llvm/test/MC/AArch64/SME2p1/directive-arch-negative.s (+12-20)
- (modified) llvm/test/MC/AArch64/SME2p1/directive-arch.s (+3-3)
- (modified) llvm/test/MC/AArch64/SME2p1/directive-arch_extension-negative.s (+5-17)
- (modified) llvm/test/MC/AArch64/SME2p1/directive-arch_extension.s (+4-9)
- (added) llvm/test/MC/AArch64/SME2p1/directive-cpu-negative.s (+17)
- (added) llvm/test/MC/AArch64/SME2p1/directive-cpu.s (+14)
- (modified) llvm/test/MC/AArch64/SME2p2/directive-arch-negative.s (+7-2)
- (modified) llvm/test/MC/AArch64/SME2p2/directive-arch.s (+5)
- (modified) llvm/test/MC/AArch64/SME2p2/directive-arch_extension-negative.s (+7)
- (modified) llvm/test/MC/AArch64/SME2p2/directive-arch_extension.s (+5)
- (modified) llvm/test/MC/AArch64/SME2p2/directive-cpu-negative.s (+7-2)
- (modified) llvm/test/MC/AArch64/SME2p2/directive-cpu.s (+5)
- (modified) llvm/test/MC/AArch64/SVE2/directive-arch-negative.s (+13-20)
- (modified) llvm/test/MC/AArch64/SVE2/directive-arch.s (+5)
- (modified) llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s (+6)
- (modified) llvm/test/MC/AArch64/SVE2/directive-arch_extension.s (+5-4)
- (modified) llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s (+14-16)
- (modified) llvm/test/MC/AArch64/SVE2/directive-cpu.s (+5)
- (modified) llvm/test/MC/AArch64/SVE2p1/directive-arch-negative.s (+13-10)
- (modified) llvm/test/MC/AArch64/SVE2p1/directive-arch.s (+5)
- (modified) llvm/test/MC/AArch64/SVE2p1/directive-arch_extension-negative.s (+10-3)
- (modified) llvm/test/MC/AArch64/SVE2p1/directive-arch_extension.s (+5)
- (added) llvm/test/MC/AArch64/SVE2p1/directive-cpu-negative.s (+22)
- (added) llvm/test/MC/AArch64/SVE2p1/directive-cpu.s (+18)
- (modified) llvm/test/MC/AArch64/SVE2p2/directive-arch-negative.s (+7-2)
- (modified) llvm/test/MC/AArch64/SVE2p2/directive-arch.s (+5)
- (modified) llvm/test/MC/AArch64/SVE2p2/directive-arch_extension-negative.s (+7)
- (modified) llvm/test/MC/AArch64/SVE2p2/directive-arch_extension.s (+5)
- (modified) llvm/test/MC/AArch64/SVE2p2/directive-cpu-negative.s (+7-2)
- (modified) llvm/test/MC/AArch64/SVE2p2/directive-cpu.s (+5)
``````````diff
diff --git a/llvm/test/MC/AArch64/FP8/directive-arch-negative.s b/llvm/test/MC/AArch64/FP8/directive-arch-negative.s
index 34fdb74fe1f370..6fd9b3a5c20f0d 100644
--- a/llvm/test/MC/AArch64/FP8/directive-arch-negative.s
+++ b/llvm/test/MC/AArch64/FP8/directive-arch-negative.s
@@ -1,55 +1,61 @@
// RUN: not llvm-mc -triple aarch64 -filetype asm -o - %s 2>&1 | FileCheck %s
-.arch armv9-a+fp8
-.arch armv9-a+nofp8
+.arch armv9-a+fp8+nofp8
bf1cvtl v0.8h, v0.8b
// CHECK: error: instruction requires: fp8
-// CHECK: bf1cvtl v0.8h, v0.8b
+// CHECK-NEXT: bf1cvtl v0.8h, v0.8b
-.arch armv9-a+faminmax
-.arch armv9-a+nofaminmax
+.arch armv9-a+faminmax+nofaminmax
famax v31.4h, v31.4h, v31.4h
// CHECK: error: instruction requires: faminmax
-// CHECK: famax v31.4h, v31.4h, v31.4h
+// CHECK-NEXT: famax v31.4h, v31.4h, v31.4h
-.arch armv9-a+fp8fma
-.arch armv9-a+nofp8fma
+.arch armv9-a+fp8fma+nofp8fma
fmlalb v0.8h, v0.16b, v0.16b
// CHECK: error: instruction requires: fp8fma
-// CHECK: fmlalb v0.8h, v0.16b, v0.16b
+// CHECK-NEXT: fmlalb v0.8h, v0.16b, v0.16b
-.arch armv9-a+ssve-fp8fma
-.arch armv9-a+nossve-fp8fma
+.arch armv9-a+ssve-fp8fma+nossve-fp8fma
fmlalb z23.h, z13.b, z0.b[7]
// CHECK: error: instruction requires: ssve-fp8fma or (sve2 and fp8fma)
-// CHECK: fmlalb z23.h, z13.b, z0.b[7]
+// CHECK-NEXT: fmlalb z23.h, z13.b, z0.b[7]
-.arch armv9-a+fp8dot2
-.arch armv9-a+nofp8dot2
+.arch armv9-a+fp8dot2+nofp8dot2
fdot v31.4h, v0.8b, v0.8b
// CHECK: error: instruction requires: fp8dot2
-// CHECK: fdot v31.4h, v0.8b, v0.8b
+// CHECK-NEXT: fdot v31.4h, v0.8b, v0.8b
-.arch armv9-a+fp8dot4
-.arch armv9-a+nofp8dot4
+.arch armv9-a+fp8dot4+nofp8dot4
fdot v0.2s, v0.8b, v31.8b
// CHECK: error: instruction requires: fp8dot4
-// CHECK: fdot v0.2s, v0.8b, v31.8b
+// CHECK-NEXT: fdot v0.2s, v0.8b, v31.8b
-.arch armv9-a+lut
-.arch armv9-a+nolut
-luti2 v30.8h, { v20.8h }, v31[7]
+.arch armv9-a+sme-f16f16+nosme-f16f16
+fsub za.h[w10, 5, vgx2], {z10.h, z11.h}
+// CHECK: error: instruction requires: sme-f16f16 or sme-f8f16
+// CHECK-NEXT: fsub za.h[w10, 5, vgx2], {z10.h, z11.h}
+
+.arch armv9-a+sme-f8f32+nosme-f8f32
+fdot za.s[w8, 0, vgx2], {z0.b-z1.b}, z0.b
+// CHECK: error: instruction requires: sme-f8f32
+// CHECK-NEXT: fdot za.s[w8, 0, vgx2], {z0.b-z1.b}, z0.b
+
+.arch armv9-a+sme-f8f16+nosme-f8f16
+fdot za.h[w8, 0, vgx2], {z0.b, z1.b}, z0.b
+// CHECK: error: instruction requires: sme-f8f16
+// CHECK-NEXT: fdot za.h[w8, 0, vgx2], {z0.b, z1.b}, z0.b
+
+.arch armv9-a+lut+nolut
+luti2 v30.8h, {v20.8h}, v31[7]
// CHECK: error: instruction requires: lut
-// CHECK: luti2 v30.8h, { v20.8h }, v31[7]
+// CHECK-NEXT: luti2 v30.8h, {v20.8h}, v31[7]
-.arch armv9-a+sve2+lut
-.arch armv9-a+nosve2+nolut
-luti2 z0.h, { z0.h }, z0[0]
+.arch armv9-a+sve2+lut+nosve2+nolut
+luti2 z0.h, {z0.h}, z0[0]
// CHECK: error: instruction requires: lut sve2 or sme2
-// CHECK: luti2 z0.h, { z0.h }, z0[0]
+// CHECK-NEXT: luti2 z0.h, {z0.h}, z0[0]
-.arch armv9-a+sme-lutv2
-.arch armv9-a+nosme-lutv2
-luti4 { z0.b - z3.b }, zt0, { z0, z1 }
+.arch armv9-a+sme-lutv2+nosme-lutv2
+luti4 {z0.b - z3.b}, zt0, {z0, z1}
// CHECK: error: instruction requires: sme-lutv2
-// CHECK: luti4 { z0.b - z3.b }, zt0, { z0, z1 }
+// CHECK-NEXT: luti4 {z0.b - z3.b}, zt0, {z0, z1}
diff --git a/llvm/test/MC/AArch64/FP8/directive-arch.s b/llvm/test/MC/AArch64/FP8/directive-arch.s
index b9803b79b58ef9..1b986b095bf072 100644
--- a/llvm/test/MC/AArch64/FP8/directive-arch.s
+++ b/llvm/test/MC/AArch64/FP8/directive-arch.s
@@ -3,44 +3,47 @@
.arch armv9-a+fp8
bf1cvtl v0.8h, v0.8b
// CHECK: bf1cvtl v0.8h, v0.8b
-.arch armv9-a+nofp8
.arch armv9-a+faminmax
famax v31.4h, v31.4h, v31.4h
// CHECK: famax v31.4h, v31.4h, v31.4h
-.arch armv9-a+nofaminmax
.arch armv9-a+fp8fma
fmlalb v0.8h, v0.16b, v0.16b
// CHECK: fmlalb v0.8h, v0.16b, v0.16b
-.arch armv9-a+nofp8fma
.arch armv9-a+ssve-fp8fma
fmlalb z23.h, z13.b, z0.b[7]
// CHECK: fmlalb z23.h, z13.b, z0.b[7]
-.arch armv9-a+nossve-fp8fma
.arch armv9-a+fp8dot2
fdot v31.4h, v0.8b, v0.8b
// CHECK: fdot v31.4h, v0.8b, v0.8b
-.arch armv9-a+nofp8dot2
.arch armv9-a+fp8dot4
fdot v0.2s, v0.8b, v31.8b
// CHECK: fdot v0.2s, v0.8b, v31.8b
-.arch armv9-a+nofp8dot4
+
+.arch armv9-a+sme-f16f16
+fsub za.h[w10, 5, vgx2], {z10.h, z11.h}
+// CHECK: fsub za.h[w10, 5, vgx2], { z10.h, z11.h }
+
+.arch armv9-a+sme-f8f32
+fdot za.s[w8, 0, vgx2], {z0.b-z1.b}, z0.b
+// CHECK: fdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+
+.arch armv9-a+sme-f8f16
+fdot za.h[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+// CHECK: fdot za.h[w8, 0, vgx2], { z0.b, z1.b }, z0.b
.arch armv9-a+lut
luti2 v30.8h, {v20.8h}, v31[7]
// CHECK: luti2 v30.8h, { v20.8h }, v31[7]
-.arch armv9-a+nolut
.arch armv9-a+sve2+lut
luti2 z0.h, {z0.h}, z0[0]
// CHECK: luti2 z0.h, { z0.h }, z0[0]
-.arch armv9-a+nosve2+nolut
.arch armv9-a+sme2p1+sme-lutv2
luti4 {z0.b-z3.b}, zt0, {z0-z1}
// CHECK: luti4 { z0.b - z3.b }, zt0, { z0, z1 }
-.arch armv9-a+nosme2p1+nosme-lutv2
diff --git a/llvm/test/MC/AArch64/FP8/directive-arch_extension-negative.s b/llvm/test/MC/AArch64/FP8/directive-arch_extension-negative.s
new file mode 100644
index 00000000000000..9b39f6f109e0ba
--- /dev/null
+++ b/llvm/test/MC/AArch64/FP8/directive-arch_extension-negative.s
@@ -0,0 +1,68 @@
+// RUN: not llvm-mc -triple aarch64 -o - %s 2>&1 | FileCheck %s
+
+.arch_extension fp8
+.arch_extension nofp8
+bf1cvtl v0.8h, v0.8b
+// CHECK: error: instruction requires: fp8
+// CHECK-NEXT: bf1cvtl v0.8h, v0.8b
+
+.arch_extension faminmax
+.arch_extension nofaminmax
+famax v31.4h, v31.4h, v31.4h
+// CHECK: error: instruction requires: faminmax
+// CHECK-NEXT: famax v31.4h, v31.4h, v31.4h
+
+.arch_extension fp8fma
+.arch_extension nofp8fma
+fmlalb v0.8h, v0.16b, v0.16b
+// CHECK: error: instruction requires: fp8fma
+// CHECK-NEXT: fmlalb v0.8h, v0.16b, v0.16b
+
+.arch_extension ssve-fp8fma
+.arch_extension nossve-fp8fma
+fmlalb z23.h, z13.b, z0.b[7]
+// CHECK: error: instruction requires: ssve-fp8fma
+// CHECK-NEXT: fmlalb z23.h, z13.b, z0.b[7]
+
+.arch_extension fp8dot2
+.arch_extension nofp8dot2
+fdot v31.4h, v0.8b, v0.8b
+// CHECK: error: instruction requires: fp8dot2
+// CHECK-NEXT: fdot v31.4h, v0.8b, v0.8b
+
+.arch_extension fp8dot4
+.arch_extension nofp8dot4
+fdot v0.2s, v0.8b, v31.8b
+// CHECK: error: instruction requires: fp8dot4
+// CHECK-NEXT: fdot v0.2s, v0.8b, v31.8b
+
+.arch_extension sme-f16f16
+.arch_extension nosme-f16f16
+fsub za.h[w10, 5, vgx2], {z10.h, z11.h}
+// CHECK: error: instruction requires: sme-f16f16 or sme-f8f16
+// CHECK-NEXT: fsub za.h[w10, 5, vgx2], {z10.h, z11.h}
+
+.arch_extension sme-f8f32
+.arch_extension nosme-f8f32
+fdot za.s[w8, 0, vgx2], {z0.b-z1.b}, z0.b
+// CHECK: error: instruction requires: sme-f8f32
+// CHECK-NEXT: fdot za.s[w8, 0, vgx2], {z0.b-z1.b}, z0.b
+
+.arch_extension sme-f8f16
+.arch_extension nosme-f8f16
+fdot za.h[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+// CHECK: error: instruction requires: sme-f8f16
+// CHECK-NEXT: fdot za.h[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+
+.arch_extension lut
+.arch_extension nolut
+luti2 v30.8h, {v20.8h}, v31[7]
+// CHECK: error: instruction requires: lut
+// CHECK-NEXT: luti2 v30.8h, {v20.8h}, v31[7]
+
+.arch_extension sme2p1
+.arch_extension sme-lutv2
+.arch_extension nosme-lutv2
+luti4 {z0.b-z3.b}, zt0, {z0-z1}
+// CHECK: error: instruction requires: sme-lutv2
+// CHECK-NEXT: luti4 {z0.b-z3.b}, zt0, {z0-z1}
\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/FP8/directive-arch_extension.s b/llvm/test/MC/AArch64/FP8/directive-arch_extension.s
new file mode 100644
index 00000000000000..cc56e84fcb868c
--- /dev/null
+++ b/llvm/test/MC/AArch64/FP8/directive-arch_extension.s
@@ -0,0 +1,50 @@
+// RUN: llvm-mc -triple aarch64 -o - %s 2>&1 | FileCheck %s
+
+.arch_extension fp8
+bf1cvtl v0.8h, v0.8b
+// CHECK: bf1cvtl v0.8h, v0.8b
+
+.arch_extension faminmax
+famax v31.4h, v31.4h, v31.4h
+// CHECK: famax v31.4h, v31.4h, v31.4h
+
+.arch_extension fp8fma
+fmlalb v0.8h, v0.16b, v0.16b
+// CHECK: fmlalb v0.8h, v0.16b, v0.16b
+
+.arch_extension ssve-fp8fma
+fmlalb z23.h, z13.b, z0.b[7]
+// CHECK: fmlalb z23.h, z13.b, z0.b[7]
+
+.arch_extension fp8dot2
+fdot v31.4h, v0.8b, v0.8b
+// CHECK: fdot v31.4h, v0.8b, v0.8b
+
+.arch_extension fp8dot4
+fdot v0.2s, v0.8b, v31.8b
+// CHECK: fdot v0.2s, v0.8b, v31.8b
+
+.arch_extension lut
+luti2 v30.8h, {v20.8h}, v31[7]
+// CHECK: luti2 v30.8h, { v20.8h }, v31[7]
+
+.arch_extension sve
+luti2 z0.h, {z0.h}, z0[0]
+// CHECK: luti2 z0.h, { z0.h }, z0[0]
+
+.arch_extension sme-f16f16
+fsub za.h[w10, 5, vgx2], {z10.h, z11.h}
+// CHECK: fsub za.h[w10, 5, vgx2], { z10.h, z11.h }
+
+.arch_extension sme-f8f32
+fdot za.s[w8, 0, vgx2], {z0.b-z1.b}, z0.b
+// CHECK: fdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+
+.arch_extension sme-f8f16
+fdot za.h[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+// CHECK: fdot za.h[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+
+.arch_extension sme2p1
+.arch_extension sme-lutv2
+luti4 {z0.b-z3.b}, zt0, {z0-z1}
+// CHECK: luti4 { z0.b - z3.b }, zt0, { z0, z1 }
\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/FP8/directive-cpu-neagtive.s b/llvm/test/MC/AArch64/FP8/directive-cpu-neagtive.s
new file mode 100644
index 00000000000000..2cfe303d02bbd4
--- /dev/null
+++ b/llvm/test/MC/AArch64/FP8/directive-cpu-neagtive.s
@@ -0,0 +1,61 @@
+// RUN: not llvm-mc -triple aarch64 -filetype asm -o - %s 2>&1 | FileCheck %s
+
+.cpu generic+fp8+nofp8
+bf1cvtl v0.8h, v0.8b
+// CHECK: error: instruction requires: fp8
+// CHECK: bf1cvtl v0.8h, v0.8b
+
+.cpu generic+faminmax+nofaminmax
+famax v31.4h, v31.4h, v31.4h
+// CHECK: error: instruction requires: faminmax
+// CHECK: famax v31.4h, v31.4h, v31.4h
+
+.cpu generic+fp8fma+nofp8fma
+fmlalb v0.8h, v0.16b, v0.16b
+// CHECK: error: instruction requires: fp8fma
+// CHECK: fmlalb v0.8h, v0.16b, v0.16b
+
+.cpu generic+ssve-fp8fma+nossve-fp8fma
+fmlalb z23.h, z13.b, z0.b[7]
+// CHECK: error: instruction requires: ssve-fp8fma or (sve2 and fp8fma)
+// CHECK: fmlalb z23.h, z13.b, z0.b[7]
+
+.cpu generic+fp8dot2+nofp8dot2
+fdot v31.4h, v0.8b, v0.8b
+// CHECK: error: instruction requires: fp8dot2
+// CHECK: fdot v31.4h, v0.8b, v0.8b
+
+.cpu generic+fp8dot4+nofp8dot4
+fdot v0.2s, v0.8b, v31.8b
+// CHECK: error: instruction requires: fp8dot4
+// CHECK: fdot v0.2s, v0.8b, v31.8b
+
+.cpu generic+sme-f16f16+nosme-f16f16
+fsub za.h[w10, 5, vgx2], {z10.h, z11.h}
+// CHECK: error: instruction requires: sme-f16f16 or sme-f8f16
+// CHECK-NEXT: fsub za.h[w10, 5, vgx2], {z10.h, z11.h}
+
+.cpu generic+sme-f8f32+nosme-f8f32
+fdot za.s[w8, 0, vgx2], {z0.b-z1.b}, z0.b
+// CHECK: error: instruction requires: sme-f8f32
+// CHECK-NEXT: fdot za.s[w8, 0, vgx2], {z0.b-z1.b}, z0.b
+
+.cpu generic+sme-f8f16+nosme-f8f16
+fdot za.h[w8, 0, vgx2], {z0.b, z1.b}, z0.b
+// CHECK: error: instruction requires: sme-f8f16
+// CHECK-NEXT: fdot za.h[w8, 0, vgx2], {z0.b, z1.b}, z0.b
+
+.cpu generic+lut+nolut
+luti2 v30.8h, { v20.8h }, v31[7]
+// CHECK: error: instruction requires: lut
+// CHECK: luti2 v30.8h, { v20.8h }, v31[7]
+
+.cpu generic+sve2+lut+nosve2+nolut
+luti2 z0.h, { z0.h }, z0[0]
+// CHECK: error: instruction requires: lut sve2 or sme2
+// CHECK: luti2 z0.h, { z0.h }, z0[0]
+
+.cpu generic+sme-lutv2+nosme-lutv2
+luti4 { z0.b - z3.b }, zt0, { z0, z1 }
+// CHECK: error: instruction requires: sme-lutv2
+// CHECK: luti4 { z0.b - z3.b }, zt0, { z0, z1 }
\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/FP8/directive-cpu.s b/llvm/test/MC/AArch64/FP8/directive-cpu.s
new file mode 100644
index 00000000000000..457cde2bc7ae3c
--- /dev/null
+++ b/llvm/test/MC/AArch64/FP8/directive-cpu.s
@@ -0,0 +1,49 @@
+// RUN: llvm-mc -triple aarch64 -o - %s 2>&1 | FileCheck %s
+
+.cpu generic+fp8
+bf1cvtl v0.8h, v0.8b
+// CHECK: bf1cvtl v0.8h, v0.8b
+
+.cpu generic+faminmax
+famax v31.4h, v31.4h, v31.4h
+// CHECK: famax v31.4h, v31.4h, v31.4h
+
+.cpu generic+fp8fma
+fmlalb v0.8h, v0.16b, v0.16b
+// CHECK: fmlalb v0.8h, v0.16b, v0.16b
+
+.cpu generic+ssve-fp8fma
+fmlalb z23.h, z13.b, z0.b[7]
+// CHECK: fmlalb z23.h, z13.b, z0.b[7]
+
+.cpu generic+fp8dot2
+fdot v31.4h, v0.8b, v0.8b
+// CHECK: fdot v31.4h, v0.8b, v0.8b
+
+.cpu generic+fp8dot4
+fdot v0.2s, v0.8b, v31.8b
+// CHECK: fdot v0.2s, v0.8b, v31.8b
+
+.cpu generic+sme-f16f16
+fsub za.h[w10, 5, vgx2], {z10.h, z11.h}
+// CHECK: fsub za.h[w10, 5, vgx2], { z10.h, z11.h }
+
+.cpu generic+sme-f8f32
+fdot za.s[w8, 0, vgx2], {z0.b-z1.b}, z0.b
+// CHECK: fdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+
+.cpu generic+sme-f8f16
+fdot za.h[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+// CHECK: fdot za.h[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+
+.cpu generic+lut
+luti2 v30.8h, {v20.8h}, v31[7]
+// CHECK: luti2 v30.8h, { v20.8h }, v31[7]
+
+.cpu generic+sve2+lut
+luti2 z0.h, {z0.h}, z0[0]
+// CHECK: luti2 z0.h, { z0.h }, z0[0]
+
+.cpu generic+sme2p1+sme-lutv2
+luti4 {z0.b-z3.b}, zt0, {z0-z1}
+// CHECK: luti4 { z0.b - z3.b }, zt0, { z0, z1 }
\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SME/directive-arch-negative.s b/llvm/test/MC/AArch64/SME/directive-arch-negative.s
new file mode 100644
index 00000000000000..2edc2f0559b953
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME/directive-arch-negative.s
@@ -0,0 +1,16 @@
+// RUN: not llvm-mc -triple aarch64 -o - %s 2>&1 | FileCheck %s
+
+.arch armv9-a+sme+nosme
+zero {za}
+// CHECK: error: instruction requires: sme
+// CHECK-NEXT: zero {za}
+
+.arch armv9-a+sme-f64f64+nosme-f64f64
+fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+// CHECK: error: instruction requires: sme-f64f64
+// CHECK-NEXT: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+
+.arch armv9-a+sme-i16i64+nosme-i16i64
+addha za0.d, p0/m, p0/m, z0.d
+// CHECK: error: instruction requires: sme-i16i64
+// CHECK-NEXT: addha za0.d, p0/m, p0/m, z0.d
\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SME/directive-arch.s b/llvm/test/MC/AArch64/SME/directive-arch.s
new file mode 100644
index 00000000000000..202e71469f2953
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME/directive-arch.s
@@ -0,0 +1,15 @@
+// RUN: llvm-mc -triple aarch64 -o - %s 2>&1 | FileCheck %s
+
+.arch armv9-a+sme
+smstart
+// CHECK: smstart
+zero {za}
+// CHECK-NEXT: zero {za}
+
+.arch armv9-a+sme-f64f64
+fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+// CHECK: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+
+.arch armv9-a+sme-i16i64
+addha za0.d, p0/m, p0/m, z0.d
+// CHECK: addha za0.d, p0/m, p0/m, z0.d
\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SME/directive-arch_extension-negative.s b/llvm/test/MC/AArch64/SME/directive-arch_extension-negative.s
new file mode 100644
index 00000000000000..feb8090ffd2854
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME/directive-arch_extension-negative.s
@@ -0,0 +1,19 @@
+// RUN: not llvm-mc -triple aarch64 -o - %s 2>&1 | FileCheck %s
+
+.arch_extension sme
+.arch_extension nosme
+zero {za}
+// CHECK: error: instruction requires: sme
+// CHECK-NEXT: zero {za}
+
+.arch_extension sme-f64f64
+.arch_extension nosme-f64f64
+fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+// CHECK: error: instruction requires: sme-f64f64
+// CHECK-NEXT: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+
+.arch_extension sme-i16i64
+.arch_extension nosme-i16i64
+addha za0.d, p0/m, p0/m, z0.d
+// CHECK: error: instruction requires: sme-i16i64
+// CHECK-NEXT: addha za0.d, p0/m, p0/m, z0.d
\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SME/directive-arch_extension.s b/llvm/test/MC/AArch64/SME/directive-arch_extension.s
new file mode 100644
index 00000000000000..aa5962b40b2b3e
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME/directive-arch_extension.s
@@ -0,0 +1,16 @@
+// RUN: llvm-mc -triple aarch64 -o - %s 2>&1 | FileCheck %s
+
+.arch_extension sme
+smstart
+// CHECK: smstart
+zero {za}
+// CHECK-NEXT: zero {za}
+
+.arch_extension sme-f64f64
+fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+// CHECK: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+
+.arch_extension sme-i16i64
+addha za0.d, p0/m, p0/m, z0.d
+// CHECK: addha za0.d, p0/m, p0/m, z0.d
+
diff --git a/llvm/test/MC/AArch64/SME/directive-cpu-negative.s b/llvm/test/MC/AArch64/SME/directive-cpu-negative.s
new file mode 100644
index 00000000000000..ed26d1df8fbd41
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME/directive-cpu-negative.s
@@ -0,0 +1,16 @@
+// RUN: not llvm-mc -triple aarch64 -o - %s 2>&1 | FileCheck %s
+
+.cpu generic+sme+nosme
+zero {za}
+// CHECK: error: instruction requires: sme
+// CHECK-NEXT: zero {za}
+
+.cpu generic+sme-f64f64+nosme-f64f64
+fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+// CHECK: error: instruction requires: sme-f64f64
+// CHECK-NEXT: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+
+.cpu generic+sme-i16i64+nosme-i16i64
+addha za0.d, p0/m, p0/m, z0.d
+// CHECK: error: instruction requires: sme-i16i64
+// CHECK-NEXT: addha za0.d, p0/m, p0/m, z0.d
\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SME/directive-cpu.s b/llvm/test/MC/AArch64/SME/directive-cpu.s
new file mode 100644
index 00000000000000..5a71e0ff98a2cd
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME/directive-cpu.s
@@ -0,0 +1,15 @@
+// RUN: llvm-mc -triple aarch64 -o - %s 2>&1 | FileCheck %s
+
+.cpu generic+sme
+smstart
+// CHECK: smstart
+zero {za}
+// CHECK-NEXT: zero {za}
+
+.cpu generic+sme-f64f64
+fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+// CHECK: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+
+.cpu generic+sme-i16i64
+addha za0.d, p0/m, p0/m, z0.d
+// CHECK: addha za0.d, p0/m, p0/m, z0.d
\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SME/directives-negative.s b/llvm/test/MC/AArch64/SME/directives-negative.s
deleted file mode 100644
index 123c3a383d71ef..00000000000000
--- a/llvm/test/MC/AArch64/SME/directives-negative.s
+++ /dev/null
@@ -1,37 +0,0 @@
-// RUN: not llvm-mc -triple aarch64 -o - %s 2>&1 | FileCheck %s
-
-.arch_extension sme
-.arch_extension nosme
-zero {za}
-// CHECK: error: instruction requires: sme
-// CHECK-NEXT: zero {za}
-
-.arch_extension sme-f64f64
-.arch_extension nosme-f64f64
-fmopa za0.d, p0/m, p0/m, z0.d, z0.d
-// CHECK: error: instruction requires: sme-f64f64
-// CHECK-NEXT: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
-
-.arch_extension sme-i16i64
-.arch_extension nosme-i16i64
-addha za0.d, p0/m, p0/m, z0.d
-// CHECK: error: instruction requires: sme-i16i64
-// CHECK-NEXT: addha za0.d, p0/m, p0/m, z0.d
-
-.arch armv9-a+sme
-.arch armv9-a+nosme
-zero {za}
-// CHECK: error: instruction requires: sme
-// CHECK-NEXT: zero {za}
-
-.arch armv9-a+sme-f64f64
-.arch armv9-a+nosme-f64f64
-fmopa za0.d, p0/m, p0/m, z0.d, z0.d
-// CHECK: error: instruction requires: sme-f64f64
-// CHECK-NEXT: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
-
-.arch armv9-a+sme-i16i64
-.arch armv9-a+nosme-i16i64
-addha za0.d, p0/m, p0/m, z0.d
-// CHECK: error: instruction requires: sme-i16i64
-// CHECK-NEXT: addha za0.d, p0/m, p0/m, z0.d
diff --git a/llvm/test/MC/AArch64/SME/directives.s b/llvm/test/MC/AArch64/SME/directives.s
deleted file mode 100644
index ca3ba9c2f8e1ec..00000000000000
--- a/llvm/test/MC/AArch64/SME/directives.s
+++ /dev/null
@@ -1,35 +0,0 @@
-// RUN: llvm-mc -triple aarch64 -o - %s 2>&1 | FileCheck %s
-
-.arch_extension sme
-smstart
-// CHECK: smstart
-
-.arch_extension nosme
-
-.arch_extension sme-f64f64
-fmopa za0.d, p0/m, p0/m, z0.d, z0.d
-// CHECK: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
-
-.arch_extension nosme-f64f64
-
-.arch_extension sme-i16i64
-addha za0.d, p0/m, p0/m, z0.d
-// CHECK: addha za0.d, p0/m, p0/m, z0.d
-
-.arch_extension nosme-i16i64
-
-.arch armv9-a+sme
-smstart
-// CHECK: smstart
-
-.arch armv9-a+nosme
-
-.arch armv9-a+sme-f64f64
-fmopa za0.d, p0/m, p0/m, z0.d, z0.d
-// CHECK: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
-
-.arch armv9-a+nosme-f64f64
-
-.arch armv9-a+sme-i16i64
-addha za0.d, p0/m, p0/m, z0.d
-// CHECK: addha za0.d, p0/m, p0/m, z0.d
diff --git a/llvm/test/MC/AArch64/SME2/directive-arch-negative.s b/llvm/test/MC/AArch64/SME2/directive-arch-negative.s
new file mode 100644
index 00000000000000..b711aa593b3606
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/directive-arch-negative.s
@@ -0,0 +1,22 @@
+// RUN: not llvm-mc -triple aarch64 -o - %s 2>&1 | FileCheck %s
+
+// SME2 should require SME
+.arch armv9-a+sme2+nosme
+sqcvt z0.h, {z0.s, z1.s}
+// CHECK: error: instruction requires: sme2
+// CHECK-NEXT: sqcvt z0.h, {z0.s, z1.s}
+
+.arch armv9-a+sme2+nosme2
+sqcvt z0.h, {z0.s, z1.s}
+// CHECK: error: instruction requires: sme2
+// CHECK-NEXT: sqcvt z0.h, {z0.s, z1.s}
+
+.arch armv9-a+sme2+sve-b16b16+nosve-b16b16
+bfclamp {z0.h, z1.h}, z0.h, z0.h
+// CHECK: error: instruction requ...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/116253
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