[llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)

[Matt Arsenault via llvm-commits]

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@@ -2666,6 +2671,46 @@ SDValue NVPTXTargetLowering::LowerShiftLeftParts(SDValue Op,
   }
 }
 
+// Lowers SETCC nodes that aren't directly supported by our arch.
+SDValue NVPTXTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
+  SDValue L = Op->getOperand(0);
+  SDValue R = Op->getOperand(1);
+
+  if (L.getValueType() != MVT::i1)
+    return SDValue();
+
+  SDLoc DL(Op);
+  SDValue Ret;
+  switch (cast<CondCodeSDNode>(Op->getOperand(2))->get()) {
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arsenm wrote:

These look like the unhandled cases in LegalizeSetCCCondCode. Move the handling there and set to expand? 

https://github.com/llvm/llvm-project/pull/115035