[llvm] [LLVM][ARM] Latency mutations for cortex m55, m7 and m85 (PR #115153)

[via llvm-commits]

dpenry wrote:

You do need to add new subtargets to that switch statement when adding them.  These two should join the big list of CortexM and CortexR processors which have a simple break for their case.

https://github.com/llvm/llvm-project/pull/115153