[llvm] [DAGCombiner] Add support for scalarising extracts of a vector setcc (PR #116031)
David Sherwood via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 13 09:40:48 PST 2024
================
@@ -3334,6 +3334,10 @@ class TargetLoweringBase {
return false;
}
+ /// Try to convert an extract element of a vector setcc operation into an
+ /// extract element followed by a scalar operation.
+ virtual bool shouldScalarizeSetCC(SDValue VecOp) const { return false; }
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david-arm wrote:
I could just reuse the existing `shouldScalarizeBinOp` hook, but the setcc op feels like a special case because the result type is often different to the input (e.g. v4i1 output, v4i32 input, etc.) and may set condition registers.
https://github.com/llvm/llvm-project/pull/116031
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