[llvm] [RISCV][MachineVerifier] Use RegUnit for register liveness checking (PR #115980)

[Matt Arsenault via llvm-commits]

================
@@ -3035,6 +3035,16 @@ void MachineVerifier::checkLiveness(const MachineOperand *MO, unsigned MONum) {
 
             if (llvm::is_contained(TRI->subregs(MOP.getReg()), Reg))
               Bad = false;
+
+            if (any_of(TRI->subregs(MOP.getReg()),
----------------
arsenm wrote:

The outer any_of should be redundant with checking the regunits of the raw register. This should also be redundant with the is_contained in subregs above.

Overall this whole verifier liveness tracking is not well implemented. BBInfo and the rest of the infrastructure should be implemented directly in terms of register units 

https://github.com/llvm/llvm-project/pull/115980