[llvm] [SDAG][ISel][TableGen] Do not skip through bitcasts when there are predicate calls (PR #116075)

[Yingwei Zheng via llvm-commits]

dtcxzyw wrote:

> The (v4i32 (bitconvert (v4i32)) could never exist in the DAG. Is the issue here that we have both a pattern with the bitconvert and a pattern without it due to `(build_vector)` also being listed? Tablegen removing the bitconvert gives 2 duplicate patterns except one no longer has a predicate and gets higher priority?
> 
> So I think this patch prevents the bitconvert pattern from being simplified away. Leaving an unneeded pattern that can never match?

I will convert it into an error.


https://github.com/llvm/llvm-project/pull/116075