[llvm] [AArch64][SVE] Detect MOV (imm, pred, zeroing/merging) (PR #116032)

[Ricardo Jesus via llvm-commits]

rj-jesus wrote:

> Can you say where the uses are coming from? I ask because I'm wondering if we should instead be lowering the intrinsics to select instructions to allow generic combines to do their thing. Plus we already have patterns to spot the select based sequences.

The uses are coming from ACLE intrinsics as in the description above. Would you rather see it done with a select in [`LowerSVEIntrinsicDUP`](https://github.com/llvm/llvm-project/blob/8e6630391699116641cf390a10476295b7d4b95c/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp#L21420)? I think that should also work well. After sending this patch through I've realised we are also missing patterns for the MOV (immediate, unpredicated) case, e.g.:
```
svuint64_t foo() {
  svbool_t pg = svptrue_b64();
  return svdup_u64_z(pg, 1);
}
```
which generates:
```
foo:
        ptrue   p0.d
        mov     z0.d, #0
        mov     w8, #1
        mov     z0.d, p0/m, x8
        ret
```
instead of:
```
foo:
        mov     z0.d, #1
        ret
```

So, we could probably address all these cases by going the select way. What do you think?

https://github.com/llvm/llvm-project/pull/116032