[llvm] [AArch64] Define high bits of FPR and GPR registers (take 2) (PR #114827)

[Sander de Smalen via llvm-commits]

sdesmalen-arm wrote:

> Thanks. If there are no objections to the name "Artificial", then LGTM.

Thanks @davemgreen! The name Artificial is already established in `TableGen` and `include/llvm/Target/Target.td`, I've just reused the name here.

https://github.com/llvm/llvm-project/pull/114827