[llvm] [TargetLowering] Use Correct VT for Multi-out Asm (PR #116024)

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git-clang-format --diff be89e794f782cb252183446967447239f80c8f9d 77592322d19cf46b512263932db11c5647b36a0b --extensions cpp -- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 1940ed25ec..bf68538e08 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -5753,7 +5753,8 @@ TargetLowering::ParseConstraints(const DataLayout &DL,
       assert(!Call.getType()->isVoidTy() && "Bad inline asm!");
       if (auto *STy = dyn_cast<StructType>(Call.getType())) {
         OpInfo.ConstraintVT =
-            getAsmOperandValueType(DL, STy->getElementType(ResNo)).getSimpleVT();
+            getAsmOperandValueType(DL, STy->getElementType(ResNo))
+                .getSimpleVT();
       } else {
         assert(ResNo == 0 && "Asm only has one result!");
         OpInfo.ConstraintVT =

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https://github.com/llvm/llvm-project/pull/116024