[llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)

[Craig Topper via llvm-commits]

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@@ -3054,6 +3089,13 @@ MachineBasicBlock::iterator RISCVInstrInfo::insertOutlinedCall(
     Module &M, MachineBasicBlock &MBB, MachineBasicBlock::iterator &It,
     MachineFunction &MF, outliner::Candidate &C) const {
 
+  if (C.CallConstructionID == MachineOutlinerTailCall) {
+    It = MBB.insert(It, BuildMI(MF, DebugLoc(), get(RISCV::PseudoTAIL))
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topperc wrote:

PseudoTAIL may overwrite either R6 or R7 if the linker doesn't relax the AUIPC+JALR sequence to JAL. How do we know it is ok to overwrite R6 or R7?

https://github.com/llvm/llvm-project/pull/115297