[llvm] [MC][AMDGPU] Support .reloc BFD_RELOC_{NONE, 32, 64} (PR #114617)

[Ethan Luis McDonough via llvm-commits]

https://github.com/EthanLuisMcDonough updated https://github.com/llvm/llvm-project/pull/114617

>From aa0fcc4b5cc80fb60dab3b50cd0cdac7a7540087 Mon Sep 17 00:00:00 2001
From: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: Fri, 1 Nov 2024 16:34:58 -0500
Subject: [PATCH 1/2] [MC][AMDGPU] Support .reloc BFD_RELOC_{NONE,32,64}

Emitting BFD_RELOC_* reloc directives can cause internal errors on AMDGPU
---
 .../Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
index c2d2ca0f90f930..3172a83e5a1fe0 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
@@ -163,12 +163,17 @@ void AMDGPUAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
 
 std::optional<MCFixupKind>
 AMDGPUAsmBackend::getFixupKind(StringRef Name) const {
-  return StringSwitch<std::optional<MCFixupKind>>(Name)
-#define ELF_RELOC(Name, Value)                                                 \
-  .Case(#Name, MCFixupKind(FirstLiteralRelocationKind + Value))
+  auto Type = StringSwitch<unsigned>(Name)
+#define ELF_RELOC(Name, Value) .Case(#Name, Value)
 #include "llvm/BinaryFormat/ELFRelocs/AMDGPU.def"
 #undef ELF_RELOC
-      .Default(std::nullopt);
+                  .Case("BFD_RELOC_NONE", ELF::R_AMDGPU_NONE)
+                  .Case("BFD_RELOC_32", ELF::R_AMDGPU_ABS32)
+                  .Case("BFD_RELOC_64", ELF::R_AMDGPU_ABS64)
+                  .Default(-1u);
+  if (Type != -1u)
+    return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
+  return std::nullopt;
 }
 
 const MCFixupKindInfo &AMDGPUAsmBackend::getFixupKindInfo(

>From 019035c21414bd33c83dbfec425e7484f24aa728 Mon Sep 17 00:00:00 2001
From: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: Tue, 12 Nov 2024 21:57:59 -0600
Subject: [PATCH 2/2] [MC][AMDGPU] Add BFD_RELOC test

---
 llvm/test/MC/AMDGPU/reloc-directive.s | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/llvm/test/MC/AMDGPU/reloc-directive.s b/llvm/test/MC/AMDGPU/reloc-directive.s
index 351a5c956295cc..99e972b3105a26 100644
--- a/llvm/test/MC/AMDGPU/reloc-directive.s
+++ b/llvm/test/MC/AMDGPU/reloc-directive.s
@@ -19,6 +19,9 @@
 # PRINT-NEXT: .reloc 0, R_AMDGPU_REL32_HI, .data
 # PRINT-NEXT: .reloc 0, R_AMDGPU_RELATIVE64, .data
 # PRINT-NEXT: .reloc 0, R_AMDGPU_REL16, .data
+# PRINT-NEXT: .reloc 0, BFD_RELOC_NONE, .data
+# PRINT-NEXT: .reloc 0, BFD_RELOC_32, .data
+# PRINT-NEXT: .reloc 0, BFD_RELOC_64, .data
 
 # CHECK:      0x2 R_AMDGPU_NONE .data
 # CHECK-NEXT: 0x1 R_AMDGPU_NONE foo 0x4
@@ -36,6 +39,9 @@
 # CHECK-NEXT: 0x0 R_AMDGPU_REL32_HI .data
 # CHECK-NEXT: 0x0 R_AMDGPU_RELATIVE64 .data
 # CHECK-NEXT: 0x0 R_AMDGPU_REL16 .data
+# CHECK-NEXT: 0x0 R_AMDGPU_NONE .data
+# CHECK-NEXT: 0x0 R_AMDGPU_ABS32 .data
+# CHECK-NEXT: 0x0 R_AMDGPU_ABS64 .data
 
 .text
   s_nop 0
@@ -56,6 +62,9 @@
   .reloc 0, R_AMDGPU_REL32_HI, .data
   .reloc 0, R_AMDGPU_RELATIVE64, .data
   .reloc 0, R_AMDGPU_REL16, .data
+  .reloc 0, BFD_RELOC_NONE, .data
+  .reloc 0, BFD_RELOC_32, .data
+  .reloc 0, BFD_RELOC_64, .data
 
 .data
 .globl foo