[llvm] [DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (PR #114349)

Adam Yang via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 12 17:19:47 PST 2024


================
@@ -294,6 +294,37 @@ class Attributes<Version ver = DXIL1_0, list<DXILAttribute> attrs> {
   list<DXILAttribute> op_attrs = attrs;
 }
 
+defvar BarrierMode_DeviceMemoryBarrier              = 2;
+defvar BarrierMode_DeviceMemoryBarrierWithGroupSync = 3;
+defvar BarrierMode_GroupMemoryBarrier               = 8;
+defvar BarrierMode_GroupMemoryBarrierWithGroupSync  = 9;
+defvar BarrierMode_AllMemoryBarrier                 = 10;
+defvar BarrierMode_AllMemoryBarrierWithGroupSync    = 11;
+
+// Intrinsic arg selection
+class Arg {
+  int index = -1;
+  int value = 0;
+  bit is_i8 = 0;
+  bit is_i32 = 0;
+}
+class ArgSelect<int index_> : Arg {
+  let index = index_;
+}
+class ArgI32<int value_> : Arg {
+  let value = value_;
+  let is_i32 = 1;
+}
+class ArgI8<int value_> : Arg {
+  let value = value_;
+  let is_i8 = 1;
+}
----------------
adam-yang wrote:

This is no longer duplicated in three places, instead a struct + enum type are generated into DXILOperation.inc that DXILOpLowering uses.

https://github.com/llvm/llvm-project/pull/114349


More information about the llvm-commits mailing list