[llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)

Artem Belevich via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 12 13:54:44 PST 2024


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@@ -18738,8 +18738,9 @@ SDValue DAGCombiner::rebuildSetCC(SDValue N) {
       if (LegalTypes)
         SetCCVT = getSetCCResultType(SetCCVT);
       // Replace the uses of XOR with SETCC
-      return DAG.getSetCC(SDLoc(N), SetCCVT, Op0, Op1,
-                          Equal ? ISD::SETEQ : ISD::SETNE);
+      const ISD::CondCode CC = Equal ? ISD::SETEQ : ISD::SETNE;
+      if (!LegalOperations || TLI.isCondCodeLegal(CC, Op0.getSimpleValueType()))
+        return DAG.getSetCC(SDLoc(N), SetCCVT, Op0, Op1, CC);
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Artem-B wrote:

This could use an explanation. Previously we'd return SETCC unconditionally. Now we're only doing it... sometimes? While I know what `TLI.isCondCodeLegal` is for, it's not quite obvious how/why our decision here depends on `LegalOperations`.

https://github.com/llvm/llvm-project/pull/115035


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