[llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)

[David Green via llvm-commits]

davemgreen wrote:

There might be some other cases with low-trip-count loops too, where we still hit the assert. Is it worth considering keeping the assert disabled for these loops? I have verified that the performance looks OK, often better now and we don't want a worse designed cost model just to appease an overly strict assert.

https://github.com/llvm/llvm-project/pull/113903