[llvm] [AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (PR #110705)

[Daniil Kovalev via llvm-commits]

================
@@ -0,0 +1,59 @@
+; RUN: llc -mtriple aarch64-linux-pauthtest -o - %s \
+; RUN:     -aarch64-authenticated-lr-check-method=xpac-hint \
+; RUN:     -stop-before=aarch64-ptrauth \
+; RUN:     | FileCheck --check-prefix=MIR %s
+
+; RUN: llc -mtriple aarch64-linux-pauthtest -o - %s \
+; RUN:     -aarch64-authenticated-lr-check-method=xpac-hint \
+; RUN:     | FileCheck --check-prefix=ASM %s
+
+target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"
+
+; Test that expansion of AUTH_TCRETURN does not crash due to unavailability of
+; neither x16 nor x17 as a scratch register.
+define i32 @test_scratch_reg_nobti(ptr %callee, ptr %addr) #0 {
+entry:
+  ; Force spilling of LR
+  tail call void asm sideeffect "", "~{lr}"()
+  ; Clobber x0-x15 and x18-x29
----------------
kovdan01 wrote:

This turned out to be an issue on my side (I misinterpreted results of local experiments). The output I'm talking about corresponded to clobber list, where everything but x17 and x18 was present (basically, x18 was replaced with x16 in clobber list). If we have all the registers clobbered, the output assembly is OK (x0 and x1 are spilled and reloaded with subsequent `braa x1, x0`).

Sorry for false-positive report. I'm resolving the thread as no issue is present actually.

https://github.com/llvm/llvm-project/pull/110705