[llvm] [DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (PR #114349)

[Justin Bogner via llvm-commits]

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@@ -294,6 +294,37 @@ class Attributes<Version ver = DXIL1_0, list<DXILAttribute> attrs> {
   list<DXILAttribute> op_attrs = attrs;
 }
 
+defvar BarrierMode_DeviceMemoryBarrier              = 2;
+defvar BarrierMode_DeviceMemoryBarrierWithGroupSync = 3;
+defvar BarrierMode_GroupMemoryBarrier               = 8;
+defvar BarrierMode_GroupMemoryBarrierWithGroupSync  = 9;
+defvar BarrierMode_AllMemoryBarrier                 = 10;
+defvar BarrierMode_AllMemoryBarrierWithGroupSync    = 11;
+
+// Intrinsic arg selection
+class Arg {
+  int index = -1;
+  int value = 0;
+  bit is_i8 = 0;
+  bit is_i32 = 0;
+}
+class ArgSelect<int index_> : Arg {
+  let index = index_;
+}
+class ArgI32<int value_> : Arg {
+  let value = value_;
+  let is_i32 = 1;
+}
+class ArgI8<int value_> : Arg {
+  let value = value_;
+  let is_i8 = 1;
+}
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bogner wrote:

The structure of this is duplicated across three different places (here, in DXILEmitter, and again in DXILOpLowering). It feels like we're breaking some abstraction that we need to repeat these definitions in three different places. Can we drive the set of types by generating a table from the DXIL.td definitions and use it elsewhere?

https://github.com/llvm/llvm-project/pull/114349