[llvm] [DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (PR #114349)

[Justin Bogner via llvm-commits]

================
@@ -308,6 +339,9 @@ class DXILOp<int opcode, DXILOpClass opclass> {
   // LLVM Intrinsic DXIL Operation maps to
   Intrinsic LLVMIntrinsic = ?;
 
+  // Non-trivial LLVM Intrinsics DXIL Operation maps to
+  list<IntrinsicSelect> intrinsic_selects = [];
+
----------------
bogner wrote:

I don't love having mutually exclusive ways to specify intrinsics here. Could we combine this into a design that handles both models well?

Names are hard, but I'm thinking we could have a versions of `IntrinsicSelect` with and without arguments, so that can just a single `list<IntrinsicSelect> IntrinsicMapping` in DXILOp, then we have a couple of cases:
```tablegen
  // Basic mapping to `llvm.dx.wave.readlane`
  let IntrinsicMapping = [Intrin<int_dx_wave_readlane>];

  // barrier:
  let IntrinsicMapping = [
    IntrinWithArgs<
        int_dx_group_memory_barrier_with_group_sync,
        [ ArgI32<BarrierMode_GroupMemoryBarrierWithGroupSync> ]>,
  ];
```

https://github.com/llvm/llvm-project/pull/114349