[llvm] b242ae3 - [AArch64][GlobalISel] Protect against undef first element in CombineShuffleConcat.

[David Green via llvm-commits]

Author: David Green
Date: 2024-11-11T19:37:51Z
New Revision: b242ae32f56372d7858945df72ce2f00f7e97bc3

URL: https://github.com/llvm/llvm-project/commit/b242ae32f56372d7858945df72ce2f00f7e97bc3
DIFF: https://github.com/llvm/llvm-project/commit/b242ae32f56372d7858945df72ce2f00f7e97bc3.diff

LOG: [AArch64][GlobalISel] Protect against undef first element in CombineShuffleConcat.

In case the first element is undef, we need to look through to find a valid
type for the inputs.

Added: 
    

Modified: 
    llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    llvm/test/CodeGen/AArch64/concat-vector.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index 32afbeaeaa249e..0945e7334ac9d4 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -445,7 +445,13 @@ bool CombinerHelper::matchCombineShuffleConcat(MachineInstr &MI,
 
 void CombinerHelper::applyCombineShuffleConcat(MachineInstr &MI,
                                                SmallVector<Register> &Ops) {
-  LLT SrcTy = MRI.getType(Ops[0]);
+  LLT SrcTy;
+  for (Register &Reg : Ops) {
+    if (Reg != 0)
+      SrcTy = MRI.getType(Reg);
+  }
+  assert(SrcTy.isValid() && "Unexpected full undef vector in concat combine");
+
   Register UndefReg = 0;
 
   for (Register &Reg : Ops) {

diff  --git a/llvm/test/CodeGen/AArch64/concat-vector.ll b/llvm/test/CodeGen/AArch64/concat-vector.ll
index 41b336bc3e8c0e..d9aaae20afc69e 100644
--- a/llvm/test/CodeGen/AArch64/concat-vector.ll
+++ b/llvm/test/CodeGen/AArch64/concat-vector.ll
@@ -271,3 +271,66 @@ define <8 x i16> @concat_v8s16_v2s16_reg(<2 x i16> %A, <2 x i16> %B, <2 x i16> %
     %d = shufflevector <8 x i16> %b, <8 x i16> %c, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
     ret <8 x i16> %d
 }
+
+define <4 x i16> @concat_undef_first_use_first(ptr %p1, ptr %p2) {
+; CHECK-SD-LABEL: concat_undef_first_use_first:
+; CHECK-SD:       // %bb.0:
+; CHECK-SD-NEXT:    ld1r { v0.2s }, [x0]
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: concat_undef_first_use_first:
+; CHECK-GI:       // %bb.0:
+; CHECK-GI-NEXT:    ldrh w8, [x0]
+; CHECK-GI-NEXT:    ldrh w9, [x0, #2]
+; CHECK-GI-NEXT:    fmov s1, w8
+; CHECK-GI-NEXT:    mov v1.h[1], w9
+; CHECK-GI-NEXT:    mov v0.s[1], v1.s[0]
+; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-GI-NEXT:    ret
+  %l1 = load <2 x i16>, ptr %p1
+  %l2 = load <2 x i16>, ptr %p2
+  %ext1 = shufflevector <2 x i16> %l1, <2 x i16> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+  %ext2 = shufflevector <2 x i16> %l1, <2 x i16> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+  %t = shufflevector <8 x i16> %ext1, <8 x i16> %ext2, <4 x i32> <i32 poison, i32 poison, i32 0, i32 1>
+  ret <4 x i16> %t
+}
+
+define <4 x i16> @concat_undef_first_use_second(ptr %p1, ptr %p2) {
+; CHECK-SD-LABEL: concat_undef_first_use_second:
+; CHECK-SD:       // %bb.0:
+; CHECK-SD-NEXT:    ld1r { v0.2s }, [x0]
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: concat_undef_first_use_second:
+; CHECK-GI:       // %bb.0:
+; CHECK-GI-NEXT:    ldrh w8, [x0]
+; CHECK-GI-NEXT:    ldrh w9, [x0, #2]
+; CHECK-GI-NEXT:    fmov s1, w8
+; CHECK-GI-NEXT:    mov v1.h[1], w9
+; CHECK-GI-NEXT:    mov v0.s[1], v1.s[0]
+; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-GI-NEXT:    ret
+  %l1 = load <2 x i16>, ptr %p1
+  %l2 = load <2 x i16>, ptr %p2
+  %ext1 = shufflevector <2 x i16> %l1, <2 x i16> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+  %ext2 = shufflevector <2 x i16> %l1, <2 x i16> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+  %t = shufflevector <8 x i16> %ext1, <8 x i16> %ext2, <4 x i32> <i32 poison, i32 poison, i32 8, i32 9>
+  ret <4 x i16> %t
+}
+
+define <4 x i16> @concat_undef_first_use_undef(ptr %p1, ptr %p2) {
+; CHECK-SD-LABEL: concat_undef_first_use_undef:
+; CHECK-SD:       // %bb.0:
+; CHECK-SD-NEXT:    ldr s0, [x0]
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: concat_undef_first_use_undef:
+; CHECK-GI:       // %bb.0:
+; CHECK-GI-NEXT:    ret
+  %l1 = load <2 x i16>, ptr %p1
+  %l2 = load <2 x i16>, ptr %p2
+  %ext1 = shufflevector <2 x i16> %l1, <2 x i16> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+  %ext2 = shufflevector <2 x i16> %l1, <2 x i16> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+  %t = shufflevector <8 x i16> %ext1, <8 x i16> %ext2, <4 x i32> <i32 poison, i32 poison, i32 2, i32 3>
+  ret <4 x i16> %t
+}