[llvm] [RISCV] Override default sched policy (PR #115445)
Min-Yih Hsu via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 11 09:56:30 PST 2024
================
@@ -199,3 +200,25 @@ unsigned RISCVSubtarget::getMinimumJumpTableEntries() const {
? RISCVMinimumJumpTableEntries
: TuneInfo->MinimumJumpTableEntries;
}
+
+void RISCVSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
+ unsigned NumRegionInstrs) const {
+ // Do bidirectional scheduling since it provides a more balanced scheduling
+ // leading to better performance. This will increase compile time.
+ Policy.OnlyTopDown = false;
+ Policy.OnlyBottomUp = false;
+
+ // Enabling or Disabling the latency heuristic is a close call: It seems to
+ // help nearly no benchmark on out-of-order architectures, on the other hand
+ // it regresses register pressure on a few benchmarking.
+ // FIXME: This is from AArch64, but we haven't evaluated it on RISC-V.
+ Policy.DisableLatencyHeuristic = true;
----------------
mshockwave wrote:
> Maybe we should enable this for in-oder cores?
Personally I would not disabling it at all because as I mentioned before, I don't think program order is any better than reducing critical path, regardless of in-order or out-of-order cores.
That said, I'm fine with enabling it for in-order cores for now and see how it goes.
https://github.com/llvm/llvm-project/pull/115445
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