[llvm] [LoongArch] Record the special AMO operand constraint with TableGen (PR #114398)

[via llvm-commits]

================
@@ -710,15 +710,22 @@ class STORE_2RI14<bits<32> op>
                "$rd, $rj, $imm14">;
 } // hasSideEffects = 0, mayLoad = 0, mayStore = 1
 
-let hasSideEffects = 0, mayLoad = 1, mayStore = 1, Constraints = "@earlyclobber $rd" in
+let hasSideEffects = 0, mayLoad = 1, mayStore = 1,
+    IsSubjectToAMORdConstraint = 1 in {
 class AM_3R<bits<32> op>
     : Fmt3R<op, (outs GPR:$rd), (ins GPR:$rk, GPRMemAtomic:$rj),
-            "$rd, $rk, $rj">;
+            "$rd, $rk, $rj"> {
+  let Constraints = "@earlyclobber $rd";
+}
 
-let hasSideEffects = 0, mayLoad = 1, mayStore = 1, Constraints = "$rd = $rd_wb" in
 class AMCAS_3R<bits<32> op>
     : Fmt3R<op, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rk, GPRMemAtomic:$rj),
-            "$rd, $rk, $rj">;
+            "$rd, $rk, $rj"> {
+  let Constraints = "$rd = $rd_wb";
----------------
heiher wrote:

Does the RISC-V `Zacas` extension also impose a restriction that prevents the `rd` operand in `cas.{w,d}` instructions from overlapping with `rs1` and `rs2`?

For LoongArch, without such constraints, it risks violating established encoding rules:

```llvm
define void @cmpxchg_ptr(ptr %ptr, ptr %new) nounwind {
  %res = cmpxchg ptr %ptr, ptr %ptr, ptr %new monotonic monotonic
  ret void
}
```

```asm
cmpxchg_ptr:                            # @cmpxchg_ptr
# %bb.0:
	amcas.d	$a0, $a1, $a0 # <---- rd == rj
	ret
```

https://github.com/llvm/llvm-project/pull/114398