[llvm] [DAGCombiner] Add basic support for `trunc nsw/nuw` (PR #113808)

[Yingwei Zheng via llvm-commits]

dtcxzyw wrote:

> Miscompilation:
> 
> ```
> define i32 @test(i1 zeroext %x, i1 zeroext %y) {
> entry:
>   %sel = select i1 %y, i64 4, i64 0
>   %conv0 = sext i1 %x to i64
>   %xor = xor i64 %sel, %conv0
>   %conv1 = trunc nsw i64 %xor to i32
>   %div = sdiv i32 %conv1, -10765
>   ret i32 %div
> }
> ```
> 
> Before:
> 
> ```
> Optimized legalized selection DAG: %bb.0 'test:entry'
> SelectionDAG has 27 nodes:
>   t0: ch,glue = EntryToken
>             t7: i32,ch = CopyFromReg t0, Register:i32 %1
>           t71: i32 = AssertZext t7, ValueType:ch:i1
>         t57: i32 = shl t71, Constant:i8<2>
>             t2: i32,ch = CopyFromReg t0, Register:i32 %0
>           t73: i32 = AssertZext t2, ValueType:ch:i1
>         t78: i32 = sub Constant:i32<0>, t73
>       t48: i32 = xor t57, t78
>     t62: i64 = sign_extend t48
>   t42: i64 = mul t62, Constant:i64<-1634202141>
>         t64: i64 = sra t42, Constant:i8<44>
>       t65: i32 = truncate t64
>         t68: i64 = srl t42, Constant:i8<63>
>       t69: i32 = truncate t68
>     t37: i32 = add t65, t69
>   t25: ch,glue = CopyToReg t0, Register:i32 $eax, t37
>   t26: ch = X86ISD::RET_GLUE t25, TargetConstant:i32<0>, Register:i32 $eax, t25:1
> ```
> 
> After:
> 
> ```
> Optimized legalized selection DAG: %bb.0 'test:entry'
> SelectionDAG has 27 nodes:
>   t0: ch,glue = EntryToken
>             t7: i32,ch = CopyFromReg t0, Register:i32 %1
>           t66: i32 = AssertZext t7, ValueType:ch:i1
>         t57: i32 = shl t66, Constant:i8<2>
>             t2: i32,ch = CopyFromReg t0, Register:i32 %0
>           t68: i32 = AssertZext t2, ValueType:ch:i1
>         t73: i32 = sub Constant:i32<0>, t68
>       t48: i32 = xor t57, t73
>     t49: i64 = any_extend t48
>   t42: i64 = mul t49, Constant:i64<-1634202141>
>         t61: i64 = sra t42, Constant:i8<44>
>       t62: i32 = truncate t61
>         t64: i64 = srl t42, Constant:i8<63>
>       t65: i32 = truncate t64
>     t37: i32 = add t62, t65
>   t25: ch,glue = CopyToReg t0, Register:i32 $eax, t37
>   t26: ch = X86ISD::RET_GLUE t25, TargetConstant:i32<0>, Register:i32 $eax, t25:1
> ```

These flags should be cleared in `TargetLowering::SimplifyDemandedBits`.


https://github.com/llvm/llvm-project/pull/113808