[llvm] [NFC] Fix test for zext(shl(trunc)) fold (PR #113778)

[Andreas Jonson via llvm-commits]

https://github.com/andjo403 created https://github.com/llvm/llvm-project/pull/113778

This fold already exist but there is a call to [shouldChangeType ](https://github.com/llvm/llvm-project/blob/91fdfec263ff2b8e88433c4294a550cabb0f2314/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp#L1202) that blocks it if the target layout is missing a definition of the types in the casts.

closes https://github.com/llvm/llvm-project/issues/61650

>From 44de592e2a4a8708d69558ed980d55cbf6ef5558 Mon Sep 17 00:00:00 2001
From: Andreas Jonson <andjo403 at hotmail.com>
Date: Sun, 27 Oct 2024 00:04:20 +0200
Subject: [PATCH] [NFC] Fix test for zext(shl(trunc)) fold

---
 llvm/test/Transforms/InstCombine/trunc-shl-zext.ll | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/llvm/test/Transforms/InstCombine/trunc-shl-zext.ll b/llvm/test/Transforms/InstCombine/trunc-shl-zext.ll
index 2e7b6d8c8f8c84..576125b86de8fc 100644
--- a/llvm/test/Transforms/InstCombine/trunc-shl-zext.ll
+++ b/llvm/test/Transforms/InstCombine/trunc-shl-zext.ll
@@ -1,12 +1,13 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt < %s -passes=instcombine -S | FileCheck %s
 
+target datalayout = "n8:16:32:64"
+
 define i32 @trunc_shl_zext_32(i32 %a) {
 ; CHECK-LABEL: define i32 @trunc_shl_zext_32
 ; CHECK-SAME: (i32 [[A:%.*]]) {
-; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i32 [[A]] to i16
-; CHECK-NEXT:    [[SHL:%.*]] = shl i16 [[TRUNC]], 4
-; CHECK-NEXT:    [[EXT:%.*]] = zext i16 [[SHL]] to i32
+; CHECK-NEXT:    [[SHL:%.*]] = shl i32 [[A]], 4
+; CHECK-NEXT:    [[EXT:%.*]] = and i32 [[SHL]], 65520
 ; CHECK-NEXT:    ret i32 [[EXT]]
 ;
   %trunc = trunc i32 %a to i16
@@ -18,9 +19,8 @@ define i32 @trunc_shl_zext_32(i32 %a) {
 define i64 @trunc_shl_zext_64(i64 %a) {
 ; CHECK-LABEL: define i64 @trunc_shl_zext_64
 ; CHECK-SAME: (i64 [[A:%.*]]) {
-; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i64 [[A]] to i8
-; CHECK-NEXT:    [[SHL:%.*]] = shl i8 [[TRUNC]], 7
-; CHECK-NEXT:    [[EXT:%.*]] = zext i8 [[SHL]] to i64
+; CHECK-NEXT:    [[SHL:%.*]] = shl i64 [[A]], 7
+; CHECK-NEXT:    [[EXT:%.*]] = and i64 [[SHL]], 128
 ; CHECK-NEXT:    ret i64 [[EXT]]
 ;
   %trunc = trunc i64 %a to i8