[llvm] [AMDGPU] Improve isBasicBlockPrologue to only add necessary instructions (PR #113303)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 25 10:47:17 PDT 2024


================
@@ -8901,6 +8901,22 @@ unsigned SIInstrInfo::getLiveRangeSplitOpcode(Register SrcReg,
   return AMDGPU::COPY;
 }
 
+bool SIInstrInfo::isPrologueOperandReload(const MachineInstr &MI) const {
+  unsigned Opcode = MI.getOpcode();
+  if ((isSGPRSpill(MI) &&
+       (MI.mayLoad() || Opcode == AMDGPU::SI_RESTORE_S32_FROM_VGPR)) ||
+      (isWWMRegSpillOpcode(Opcode) && MI.mayLoad())) {
+    Register Reg = MI.defs().begin()->getReg();
+    const MachineBasicBlock *MBB = MI.getParent();
+    MachineBasicBlock::const_instr_iterator I(MI), E = MBB->instr_end();
+    while (++I != E) {
+      if (I->readsRegister(Reg, &RI) && isBasicBlockPrologue(*I))
----------------
arsenm wrote:

This shouldn't be recursive.

https://github.com/llvm/llvm-project/pull/113303


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