[llvm] [RISCV] Allow crypto features to imply dependents (PR #112659)

via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 25 09:43:26 PDT 2024


github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


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git-clang-format --diff 47e6d1816251e90b3d589710c5203a92c6015a7c e71598ec3559bc771ebd767ac52b4e7410e7cd3c --extensions cpp -- llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
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View the diff from clang-format here.
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diff --git a/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp b/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
index 870c7a94f0..5c4866b508 100644
--- a/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+++ b/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
@@ -645,10 +645,18 @@ TEST(ParseArchString, MissingDepency) {
 
   // These all have an implication relationship, thus should pass
   for (StringRef Input : {
-    "rv32i_zvbb", "rv32i_zvbc32e0p7", "rv32i_zvbc", "rv32i_zvkb", "rv32i_zvkg",
-    "rv32i_zvkgs0p7", "rv32i_zvkned", "rv32i_zvknha", "rv32i_zvksed",
-    "rv32i_zvksh", "rv32i_zvknhb",
-  }) {
+           "rv32i_zvbb",
+           "rv32i_zvbc32e0p7",
+           "rv32i_zvbc",
+           "rv32i_zvkb",
+           "rv32i_zvkg",
+           "rv32i_zvkgs0p7",
+           "rv32i_zvkned",
+           "rv32i_zvknha",
+           "rv32i_zvksed",
+           "rv32i_zvksh",
+           "rv32i_zvknhb",
+       }) {
     EXPECT_EQ(toString(RISCVISAInfo::parseArchString(Input, true).takeError()),
               "");
   }

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https://github.com/llvm/llvm-project/pull/112659


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