[llvm] [AMDGPU][MC] Fix disassembler problem for image_atomic with TFE (PR #112622)

[Mirko Brkušanin via llvm-commits]

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@@ -1119,14 +1119,21 @@ multiclass MIMG_Atomic <mimgopc op, string asm, bit isCmpSwap = 0, bit isFP = 0,
       // _V* variants have different dst size, but the size is encoded implicitly,
       // using dmask and tfe. Only 32-bit variant is registered with disassembler.
       // Other variants are reconstructed by disassembler using dmask and tfe.
-      let VDataDwords = !if(isCmpSwap, 2, 1) in
-      defm _V1 : MIMG_Atomic_Addr_Helper_m <op, asm, !if(isCmpSwap, VReg_64, VGPR_32), 1, isFP, renamed>;
-      let VDataDwords = !if(isCmpSwap, 4, 2) in
-      defm _V2 : MIMG_Atomic_Addr_Helper_m <op, asm, !if(isCmpSwap, VReg_128, VReg_64), 0, isFP, renamed>;
-      let VDataDwords = !if(isCmpSwap, 2, 2) in
+      if !not(isCmpSwap) then
+        let VDataDwords = 1 in
+        defm _V1 : MIMG_Atomic_Addr_Helper_m <op, asm, VGPR_32, 1, isFP, renamed>;
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mbrkusanin wrote:

brackets

https://github.com/llvm/llvm-project/pull/112622